@inproceedings{HOFFMANN:SBLP:20,
title = {Stream Parallelism Annotations for Multi-Core Frameworks},
author = {Renato B Hoffmann and Dalvan Griebler and Marco Danelutto and Luiz G Fernandes},
url = {https://doi.org/10.1145/3427081.3427088},
doi = {10.1145/3427081.3427088},
year = {2020},
date = {2020-10-01},
booktitle = {XXIV Brazilian Symposium on Programming Languages (SBLP)},
pages = {48-55},
publisher = {ACM},
address = {Natal, Brazil},
series = {SBLP'20},
abstract = {Data generation, collection, and processing is an important workload of modern computer architectures. Stream or high-intensity data flow applications are commonly employed in extracting and interpreting the information contained in this data. Due to the computational complexity of these applications, high-performance ought to be achieved using parallel computing. Indeed, the efficient exploitation of available parallel resources from the architecture remains a challenging task for the programmers. Techniques and methodologies are required to help shift the efforts from the complexity of parallelism exploitation to specific algorithmic solutions. To tackle this problem, we propose a methodology that provides the developer with a suitable abstraction layer between a clean and effective parallel programming interface targeting different multi-core parallel programming frameworks. We used standard C++ code annotations that may be inserted in the source code by the programmer. Then, a compiler parses C++ code with the annotations and generates calls to the desired parallel runtime API. Our experiments demonstrate the feasibility of our methodology and the performance of the abstraction layer, where the difference is negligible in four applications with respect to the state-of-the-art C++ parallel programming frameworks. Additionally, our methodology allows improving the application performance since the developers can choose the runtime that best performs in their system.},
keywords = {},
pubstate = {published},
tppubtype = {inproceedings}
}

@inproceedings{GARCIA:ICCSA:20,
title = {The Impact of CPU Frequency Scaling on Power Consumption of Computing Infrastructures},
author = {Adriano M Garcia and Matheus Serpa and Dalvan Griebler and Claudio Schepke and Luiz G L Fernandes and Philippe O A Navaux},
url = {https://doi.org/10.1007/978-3-030-58817-5_12},
doi = {10.1007/978-3-030-58817-5_12},
year = {2020},
date = {2020-07-01},
booktitle = {International Conference on Computational Science and its Applications (ICCSA)},
volume = {12254},
pages = {142-157},
publisher = {Springer},
address = {Cagliari, Italy},
series = {ICCSA'20},
abstract = {Since the demand for computing power increases, new architectures emerged to obtain better performance. Reducing the power and energy consumption of these architectures is one of the main challenges to achieving high-performance computing. Current research trends aim at developing new software and hardware techniques to achieve the best performance and energy trade-offs. In this work, we investigate the impact of different CPU frequency scaling techniques such as ondemand, performance, and powersave on the power and energy consumption of multi-core based computer infrastructure. We apply these techniques in PAMPAR, a parallel benchmark suite implemented in PThreads, OpenMP, MPI-1, and MPI-2 (spawn). We measure the energy and execution time of 10 benchmarks, varying the number of threads. Our results show that although powersave consumes up to 43.1% less power than performance and ondemand governors, it consumes the triple of energy due to the high execution time. Our experiments also show that the performance governor consumes up to 9.8% more energy than ondemand for CPU-bound benchmarks. Finally, our results show that PThreads has the lowest power consumption, consuming less than the sequential version for memory-bound benchmarks. Regarding performance, the performance governor achieved 3% of performance over the ondemand.},
keywords = {},
pubstate = {published},
tppubtype = {inproceedings}
}

@article{STEIN:CCPE:20,
title = {Latency‐aware adaptive micro‐batching techniques for streamed data compression on graphics processing units},
author = {Charles M Stein and Dinei A Rockenbach and Dalvan Griebler and Massimo Torquati and Gabriele Mencagli and Marco Danelutto and Luiz G Fernandes},
url = {https://doi.org/10.1002/cpe.5786},
doi = {10.1002/cpe.5786},
year = {2020},
date = {2020-05-01},
journal = {Concurrency and Computation: Practice and Experience},
volume = {na},
number = {na},
pages = {e5786},
publisher = {Wiley Online Library},
abstract = {Stream processing is a parallel paradigm used in many application domains. With the advance of graphics processing units (GPUs), their usage in stream processing applications has increased as well. The efficient utilization of GPU accelerators in streaming scenarios requires to batch input elements in microbatches, whose computation is offloaded on the GPU leveraging data parallelism within the same batch of data. Since data elements are continuously received based on the input speed, the bigger the microbatch size the higher the latency to completely buffer it and to start the processing on the device. Unfortunately, stream processing applications often have strict latency requirements that need to find the best size of the microbatches and to adapt it dynamically based on the workload conditions as well as according to the characteristics of the underlying device and network. In this work, we aim at implementing latency‐aware adaptive microbatching techniques and algorithms for streaming compression applications targeting GPUs. The evaluation is conducted using the Lempel‐Ziv‐Storer‐Szymanski compression application considering different input workloads. As a general result of our work, we noticed that algorithms with elastic adaptation factors respond better for stable workloads, while algorithms with narrower targets respond better for highly unbalanced workloads.},
keywords = {},
pubstate = {published},
tppubtype = {article}
}

@inproceedings{LOFF:ERAD:20,
title = {Implementação Paralela do LU no NPB C++ Utilizando um Pipeline Implícito},
author = {Junior Löff and Dalvan Griebler and Luiz G L Fernandes},
url = {https://doi.org/10.5753/eradrs.2020.10750},
doi = {10.5753/eradrs.2020.10750},
year = {2020},
date = {2020-04-01},
booktitle = {XX Escola Regional de Alto Desempenho da Região Sul (ERAD-RS)},
pages = {37-40},
publisher = {Sociedade Brasileira de Computação (SBC)},
address = {Santa Maria, BR},
abstract = {Neste trabalho, um pipeline implícito com o padrão map foi implementado na aplicação LU do NAS Parallel Benchmarks em C++. O LU possui dependência de dados no tempo, o que dificulta a exploração do paralelismo. Ele foi convertido de Fortran para C++, a fim de ser paralelizado com diferentes bibliotecas de sistemas multi-core. O uso desta estratégia com as bibliotecas permitiu ganhos de desempenho de até 10.6% em relação a versão original.},
keywords = {},
pubstate = {published},
tppubtype = {inproceedings}
}

@inproceedings{ARAUJO:ERAD:20,
title = {Implementação CUDA dos Kernels NPB},
author = {Gabriell Alves de Araújo and Dalvan Griebler and Luiz G L Fernandes},
url = {https://doi.org/10.5753/eradrs.2020.10762},
doi = {10.5753/eradrs.2020.10762},
year = {2020},
date = {2020-04-01},
booktitle = {XX Escola Regional de Alto Desempenho da Região Sul (ERAD-RS)},
pages = {85-88},
publisher = {Sociedade Brasileira de Computação (SBC)},
address = {Santa Maria, BR},
abstract = {NAS Parallel Benchmarks (NPB) é um conjunto de benchmarks utilizado para avaliar hardware e software, que ao longo dos anos foi portado para diferentes frameworks. Concernente a GPUs, atualmente existem apenas versões OpenCL e OpenACC. Este trabalho contribui com a literatura provendo a primeira implementação CUDA completa dos kernels do NPB, realizando experimentos com carga de trabalho inédita e revelando novos fatos sobre o NPB.},
keywords = {},
pubstate = {published},
tppubtype = {inproceedings}
}