2017 |
Griebler, Dalvan; Fernandes, Luiz Gustavo Towards Distributed Parallel Programming Support for the SPar DSL Inproceedings doi Parallel Computing is Everywhere, Proceedings of the International Conference on Parallel Computing, pp. 563-572, IOS Press, Bologna, Italy, 2017. @inproceedings{GRIEBLER:PARCO:17, title = {Towards Distributed Parallel Programming Support for the SPar DSL}, author = {Dalvan Griebler and Luiz Gustavo Fernandes}, url = {https://doi.org/10.3233/978-1-61499-843-3-563}, doi = {10.3233/978-1-61499-843-3-563}, year = {2017}, date = {2017-09-01}, booktitle = {Parallel Computing is Everywhere, Proceedings of the International Conference on Parallel Computing}, pages = {563-572}, publisher = {IOS Press}, address = {Bologna, Italy}, series = {ParCo'17}, abstract = {SPar was originally designed to provide high-level abstractions for stream parallelism in C++ programs targeting multi-core systems. This work proposes distributed parallel programming support for SPar targeting cluster environments. The goal is to preserve the original semantics while source-to-source code transformations will be turned into MPI (Message Passing Interface) parallel code. The results of the experiments presented in the paper demonstrate improved programmability without significant performance losses.}, keywords = {}, pubstate = {published}, tppubtype = {inproceedings} } SPar was originally designed to provide high-level abstractions for stream parallelism in C++ programs targeting multi-core systems. This work proposes distributed parallel programming support for SPar targeting cluster environments. The goal is to preserve the original semantics while source-to-source code transformations will be turned into MPI (Message Passing Interface) parallel code. The results of the experiments presented in the paper demonstrate improved programmability without significant performance losses. |
Araujo, Gabriell; Ledur, Cleverson; Griebler, Dalvan; Fernandes, Luiz G Exploração do Paralelismo em Algoritmos de Mineração de Dados com Pthreads, OpenMP, FastFlow, TBB e Phoenix++ Inproceedings Escola Regional de Alto Desempenho (ERAD/RS), pp. 4, Sociedade Brasileira de Computação (SBC), Ijuí, RS, BR, 2017. @inproceedings{ARAUJO:ERAD:17, title = {Exploração do Paralelismo em Algoritmos de Mineração de Dados com Pthreads, OpenMP, FastFlow, TBB e Phoenix++}, author = {Gabriell Araujo and Cleverson Ledur and Dalvan Griebler and Luiz G. Fernandes}, url = {https://gmap.pucrs.br/dalvan/papers/2017/CR_ERAD_IC_Araujo_2017.pdf}, year = {2017}, date = {2017-04-01}, booktitle = {Escola Regional de Alto Desempenho (ERAD/RS)}, pages = {4}, publisher = {Sociedade Brasileira de Computação (SBC)}, address = {Ijuí, RS, BR}, abstract = {Com o objetivo de introduzir algoritmos de mineração de dados paralelos na DSL GMaVis, foram paralelizadas quatro aplicações com cinco interfaces de programação paralela. Este trabalho apresenta a comparação destas interfaces, a fim de avaliar qual oferece maior desempenho e produtividade de código. Os resultados demonstram que é possível atingir menor número de linhas de código e bom desempenho com OpenMP e FastFlow.}, keywords = {}, pubstate = {published}, tppubtype = {inproceedings} } Com o objetivo de introduzir algoritmos de mineração de dados paralelos na DSL GMaVis, foram paralelizadas quatro aplicações com cinco interfaces de programação paralela. Este trabalho apresenta a comparação destas interfaces, a fim de avaliar qual oferece maior desempenho e produtividade de código. Os resultados demonstram que é possível atingir menor número de linhas de código e bom desempenho com OpenMP e FastFlow. |
de Mesquita, Cassiano E; Ledur, Cleverson; Griebler, Dalvan; Fernandes, Luiz G Proposta de uma Plataforma para Experimentos de Software em Programação Paralela Inproceedings Escola Regional de Alto Desempenho (ERAD/RS), pp. 4, Sociedade Brasileira de Computação (SBC), Ijuí, RS, BR, 2017. @inproceedings{MESQUITA:ERAD:17, title = {Proposta de uma Plataforma para Experimentos de Software em Programação Paralela}, author = {Cassiano E. de Mesquita and Cleverson Ledur and Dalvan Griebler and Luiz G. Fernandes}, url = {https://gmap.pucrs.br/dalvan/papers/2017/CR_ERAD_PG_Mesquita_2017.pdf}, year = {2017}, date = {2017-04-01}, booktitle = {Escola Regional de Alto Desempenho (ERAD/RS)}, pages = {4}, publisher = {Sociedade Brasileira de Computação (SBC)}, address = {Ijuí, RS, BR}, abstract = {Este artigo propõe uma plataforma web para simplificar a avaliação de interfaces de programação paralela. A ideia central é identificar as dificuldades enfrentadas por potenciais desenvolvedores a fim de propor melhorias que irão reduzir o esforço na paralelização de aplicações. A plataforma prevista é composta de uma interface web, implementada com linguagens PHP e Javascript.}, keywords = {}, pubstate = {published}, tppubtype = {inproceedings} } Este artigo propõe uma plataforma web para simplificar a avaliação de interfaces de programação paralela. A ideia central é identificar as dificuldades enfrentadas por potenciais desenvolvedores a fim de propor melhorias que irão reduzir o esforço na paralelização de aplicações. A plataforma prevista é composta de uma interface web, implementada com linguagens PHP e Javascript. |
Vogel, Adriano; Griebler, Dalvan; Fernandes, Luiz Gustavo Proposta de Implementação de Grau de Paralelismo Adaptativo em uma DSL para Paralelismo de Stream Inproceedings Escola Regional de Alto Desempenho (ERAD/RS), pp. 4, Sociedade Brasileira de Computação (SBC), Ijuí, RS, BR, 2017. @inproceedings{VOGEL:ERAD:17, title = {Proposta de Implementação de Grau de Paralelismo Adaptativo em uma DSL para Paralelismo de Stream}, author = {Adriano Vogel and Dalvan Griebler and Luiz Gustavo Fernandes}, url = {https://gmap.pucrs.br/dalvan/papers/2017/CR_ERAD_PG_Vogel_2017.pdf}, year = {2017}, date = {2017-04-01}, booktitle = {Escola Regional de Alto Desempenho (ERAD/RS)}, pages = {4}, publisher = {Sociedade Brasileira de Computação (SBC)}, address = {Ijuí, RS, BR}, abstract = {A classe de aplicações de stream possuem características únicas, como variação nas entradas/saídas e execuções por períodos indefinidos. Este paradigma é utilizado com intuito de diminuir os tempos de execução e aumentar a vazão das aplicações. Nesse estudo é proposto o suporte adaptativo do grau de paralelismo de stream na DSL (Domain-Specific Language) SPar.}, keywords = {}, pubstate = {published}, tppubtype = {inproceedings} } A classe de aplicações de stream possuem características únicas, como variação nas entradas/saídas e execuções por períodos indefinidos. Este paradigma é utilizado com intuito de diminuir os tempos de execução e aumentar a vazão das aplicações. Nesse estudo é proposto o suporte adaptativo do grau de paralelismo de stream na DSL (Domain-Specific Language) SPar. |
Löff, Júnior; Griebler, Dalvan; Ledur, Cleverson; Fernandes, Luiz G Explorando a Flexibilidade e o Desempenho da Biblioteca FastFlow com o Padrão Paralelo Farm Inproceedings Escola Regional de Alto Desempenho (ERAD/RS), pp. 4, Sociedade Brasileira de Computação (SBC), Ijuí, RS, BR, 2017. @inproceedings{LOFF:ERAD:17, title = {Explorando a Flexibilidade e o Desempenho da Biblioteca FastFlow com o Padrão Paralelo Farm}, author = {Júnior Löff and Dalvan Griebler and Cleverson Ledur and Luiz G. Fernandes}, url = {https://gmap.pucrs.br/dalvan/papers/2017/CR_ERAD_IC_Loff_2017.pdf}, year = {2017}, date = {2017-04-01}, booktitle = {Escola Regional de Alto Desempenho (ERAD/RS)}, pages = {4}, publisher = {Sociedade Brasileira de Computação (SBC)}, address = {Ijuí, RS, BR}, abstract = {O paralelismo é uma tarefa para especialistas, onde o desafio é utilizar abstrações que ofereçam a flexibilidade e expressividade necessária para atingir o melhor desempenho. Este artigo visa explorar variações na implementação do padrão Farm utilizando a biblioteca FastFlow nos algoritmos K-means (domínio da mineração de dados) e Mandelbrot Set (domínio da matemática). Concluímos que o padrão Farm oferece boa flexibilidade e bom desempenho.}, keywords = {}, pubstate = {published}, tppubtype = {inproceedings} } O paralelismo é uma tarefa para especialistas, onde o desafio é utilizar abstrações que ofereçam a flexibilidade e expressividade necessária para atingir o melhor desempenho. Este artigo visa explorar variações na implementação do padrão Farm utilizando a biblioteca FastFlow nos algoritmos K-means (domínio da mineração de dados) e Mandelbrot Set (domínio da matemática). Concluímos que o padrão Farm oferece boa flexibilidade e bom desempenho. |
Filho, Renato B H; Griebler, Dalvan; Ledur, Cleverson; Fernandes, Luiz G Avaliando a Produtividade e o Desempenho da DSL SPar em uma Aplicação de Detecção de Pistas Inproceedings Escola Regional de Alto Desempenho (ERAD/RS), pp. 4, Sociedade Brasileira de Computação (SBC), Ijuí, RS, BR, 2017. @inproceedings{FILHO:ERAD:17, title = {Avaliando a Produtividade e o Desempenho da DSL SPar em uma Aplicação de Detecção de Pistas}, author = {Renato B. H. Filho and Dalvan Griebler and Cleverson Ledur and Luiz G. Fernandes}, url = {https://gmap.pucrs.br/dalvan/papers/2017/CR_ERAD_IC_Hoffmann.pdf}, year = {2017}, date = {2017-04-01}, booktitle = {Escola Regional de Alto Desempenho (ERAD/RS)}, pages = {4}, publisher = {Sociedade Brasileira de Computação (SBC)}, address = {Ijuí, RS, BR}, abstract = {A linguagem de domínio específico SPar, embarcada na linguagem C++, fornece através de anotações uma alternativa para explorar o paralelismo de stream em arquiteturas multi-núcleo. Neste artigo, o objetivo é demonstrar indicadores de desempenho e produtividade em uma aplicação de detecção de pistas. Os resultados comprovaram que a SPar apresentou maior produtividade e bom desempenho.}, keywords = {}, pubstate = {published}, tppubtype = {inproceedings} } A linguagem de domínio específico SPar, embarcada na linguagem C++, fornece através de anotações uma alternativa para explorar o paralelismo de stream em arquiteturas multi-núcleo. Neste artigo, o objetivo é demonstrar indicadores de desempenho e produtividade em uma aplicação de detecção de pistas. Os resultados comprovaram que a SPar apresentou maior produtividade e bom desempenho. |
Vogel, Adriano; Griebler, Dalvan; Schepke, Claudio; Fernandes, Luiz Gustavo An Intra-Cloud Networking Performance Evaluation on CloudStack Environment Inproceedings doi 25th Euromicro International Conference on Parallel, Distributed and Network-Based Processing (PDP), pp. 5, IEEE, St. Petersburg, Russia, 2017. @inproceedings{larcc:intra-cloud_networking_cloudstack:PDP:17, title = {An Intra-Cloud Networking Performance Evaluation on CloudStack Environment}, author = {Adriano Vogel and Dalvan Griebler and Claudio Schepke and Luiz Gustavo Fernandes}, doi = {10.1109/PDP.2017.40}, year = {2017}, date = {2017-03-01}, booktitle = {25th Euromicro International Conference on Parallel, Distributed and Network-Based Processing (PDP)}, pages = {5}, publisher = {IEEE}, address = {St. Petersburg, Russia}, abstract = {Infrastructure-as-a-Service (IaaS) is a cloud on-demand commodity built on top of virtualization technologies and managed by IaaS tools. In this scenario, performance is a relevant matter because a set of aspects may impact and increase the system overhead.Specific on the network, the use of virtualized capabilities may cause performance degradation (eg.,latency, throughput). The goal of this paper is to contribute to networking performance evaluation, providing new insights for private IaaS clouds. To achieve our goal, we deploy CloudStack environments and conduct experiments with different configurations and techniques. The research findings demonstrate that KVM-based cloud instances have small network performance degradation regarding throughput (about 0.2% for coarse-grained and 6.8% for fine-grained messages) while container-based instances have even better results. On the other hand, the KVM instances present worst latency (about 12.4% on coarse-grained and two times more on fine-grained messages w.r.t. native environment) and better in container-based instances, where the performance results are close to the native environment. Furthermore, we demonstrate a performance optimization of applications running on KVM.}, keywords = {}, pubstate = {published}, tppubtype = {inproceedings} } Infrastructure-as-a-Service (IaaS) is a cloud on-demand commodity built on top of virtualization technologies and managed by IaaS tools. In this scenario, performance is a relevant matter because a set of aspects may impact and increase the system overhead.Specific on the network, the use of virtualized capabilities may cause performance degradation (eg.,latency, throughput). The goal of this paper is to contribute to networking performance evaluation, providing new insights for private IaaS clouds. To achieve our goal, we deploy CloudStack environments and conduct experiments with different configurations and techniques. The research findings demonstrate that KVM-based cloud instances have small network performance degradation regarding throughput (about 0.2% for coarse-grained and 6.8% for fine-grained messages) while container-based instances have even better results. On the other hand, the KVM instances present worst latency (about 12.4% on coarse-grained and two times more on fine-grained messages w.r.t. native environment) and better in container-based instances, where the performance results are close to the native environment. Furthermore, we demonstrate a performance optimization of applications running on KVM. |
Rista, Cassiano; Griebler, Dalvan; Maron, Carlos A F; Fernandes, Luiz Gustavo Improving the Network Performance of a Container-Based Cloud Environment for Hadoop Systems Inproceedings doi International Conference on High Performance Computing & Simulation (HPCS), pp. 619-626, IEEE, Genoa, Italy, 2017. @inproceedings{larcc:link_aggregation:HPCS:2017, title = {Improving the Network Performance of a Container-Based Cloud Environment for Hadoop Systems}, author = {Cassiano Rista and Dalvan Griebler and Carlos A F Maron and Luiz Gustavo Fernandes}, url = {http://ieeexplore.ieee.org/document/8035136/}, doi = {10.1109/HPCS.2017.97}, year = {2017}, date = {2017-07-01}, booktitle = {International Conference on High Performance Computing & Simulation (HPCS)}, pages = {619-626}, publisher = {IEEE}, address = {Genoa, Italy}, series = {HPCS'17}, abstract = {Cloud computing has emerged as an important paradigm to improve resource utilization, efficiency, flexibility, and the pay-per-use billing structure. However, cloud platforms cause performance degradations due to their virtualization layer and may not be appropriate for the requirements of high-performance applications, such as big data. This paper tackles the problem of improving network performance in container-based cloud instances to create a viable alternative to run network intensive Hadoop applications. Our approach consists of deploying link aggregation via the IEEE 802.3ad standard to increase the available bandwidth and using LXC (Linux Container) cloud instances to create a Hadoop cluster. In order to evaluate the efficiency of our approach and the overhead added by the container-based cloud environment, we ran a set of experiments to measure throughput, latency, bandwidth utilization, and completion times. The results prove that our approach adds minimal overhead in cloud environment as well as increases throughput and reduces latency. Moreover, our approach demonstrates a suitable alternative for running Hadoop applications, reducing completion times up to 33.73%}, keywords = {}, pubstate = {published}, tppubtype = {inproceedings} } Cloud computing has emerged as an important paradigm to improve resource utilization, efficiency, flexibility, and the pay-per-use billing structure. However, cloud platforms cause performance degradations due to their virtualization layer and may not be appropriate for the requirements of high-performance applications, such as big data. This paper tackles the problem of improving network performance in container-based cloud instances to create a viable alternative to run network intensive Hadoop applications. Our approach consists of deploying link aggregation via the IEEE 802.3ad standard to increase the available bandwidth and using LXC (Linux Container) cloud instances to create a Hadoop cluster. In order to evaluate the efficiency of our approach and the overhead added by the container-based cloud environment, we ran a set of experiments to measure throughput, latency, bandwidth utilization, and completion times. The results prove that our approach adds minimal overhead in cloud environment as well as increases throughput and reduces latency. Moreover, our approach demonstrates a suitable alternative for running Hadoop applications, reducing completion times up to 33.73% |
2016 |
Teodoro, Silvana; do Carmo, Andriele Busatto; Adornes, Daniel Couto; Fernandes, Luiz Gustavo A comparative study of energy-aware scheduling algorithms for computational grids Journal Article doi Journal of Systems and Software, 117 , pp. 153-165, 2016. @article{gmap:TEODORO:JSS:16, title = {A comparative study of energy-aware scheduling algorithms for computational grids}, author = {Silvana Teodoro and Andriele Busatto do Carmo and Daniel Couto Adornes and Luiz Gustavo Fernandes}, url = {https://doi.org/10.1016/j.jss.2016.02.017}, doi = {10.1016/j.jss.2016.02.017}, year = {2016}, date = {2016-07-01}, journal = {Journal of Systems and Software}, volume = {117}, pages = {153-165}, publisher = {Elsevier}, abstract = {Recent advances in High Performance Computing (HPC) have required the attention of scientific community regarding aspects that do not concern only performance. In order to enhance computational capacity, modern parallel and distributed architectures are designed with more processing units, causing an increase in energy consumption. Currently, one of the most representative HPC platforms are computational grids, which are used in many scientific and academic projects. In this work, we propose four energy-aware scheduling algorithms to efficiently manage the energy consumption in computational grids, trying to mitigate performance loss. Our algorithms propose an efficient management of idle resources and a clever use of active ones. We have evaluated our algorithms using the SimGrid framework and an energy consumption estimation method we proposed for Bag-of-Tasks-type (BoT) applications. We compared our algorithms against five others developed to work with computational grids. In a set of experimental scenarios, our results show that by using our algorithms it is possible to achieve up to 75.90% of reduction in the energy consumption combined with 5.28% of performance loss compared with the best algorithm in performance.}, keywords = {}, pubstate = {published}, tppubtype = {article} } Recent advances in High Performance Computing (HPC) have required the attention of scientific community regarding aspects that do not concern only performance. In order to enhance computational capacity, modern parallel and distributed architectures are designed with more processing units, causing an increase in energy consumption. Currently, one of the most representative HPC platforms are computational grids, which are used in many scientific and academic projects. In this work, we propose four energy-aware scheduling algorithms to efficiently manage the energy consumption in computational grids, trying to mitigate performance loss. Our algorithms propose an efficient management of idle resources and a clever use of active ones. We have evaluated our algorithms using the SimGrid framework and an energy consumption estimation method we proposed for Bag-of-Tasks-type (BoT) applications. We compared our algorithms against five others developed to work with computational grids. In a set of experimental scenarios, our results show that by using our algorithms it is possible to achieve up to 75.90% of reduction in the energy consumption combined with 5.28% of performance loss compared with the best algorithm in performance. |
Vogel, Adriano; Griebler, Dalvan; Maron, Carlos A F; Schepke, Claudio; Fernandes, Luiz Gustavo Private IaaS Clouds: A Comparative Analysis of OpenNebula, CloudStack and OpenStack Inproceedings doi 24th Euromicro International Conference on Parallel, Distributed and Network-Based Processing (PDP), pp. 672-679, IEEE, Heraklion Crete, Greece, 2016. @inproceedings{larcc:IaaS_private:PDP:16, title = {Private IaaS Clouds: A Comparative Analysis of OpenNebula, CloudStack and OpenStack}, author = {Adriano Vogel and Dalvan Griebler and Carlos A F Maron and Claudio Schepke and Luiz Gustavo Fernandes}, url = {http://ieeexplore.ieee.org/document/7445407/}, doi = {10.1109/PDP.2016.75}, year = {2016}, date = {2016-02-01}, booktitle = {24th Euromicro International Conference on Parallel, Distributed and Network-Based Processing (PDP)}, pages = {672-679}, publisher = {IEEE}, address = {Heraklion Crete, Greece}, series = {PDP'16}, abstract = {Despite the evolution of cloud computing in recent years, the performance and comprehensive understanding of the available private cloud tools are still under research. This paper contributes to an analysis of the Infrastructure as a Service (IaaS) domain by mapping new insights and discussing the challenges for improving cloud services. The goal is to make a comparative analysis of OpenNebula, OpenStack and CloudStack tools, evaluating their differences on support for flexibility and resiliency. Also, we aim at evaluating these three cloud tools when they are deployed using a mutual hypervisor (KVM) for discovering new empirical insights. Our research results demonstrated that OpenStack is the most resilient and CloudStack is the most flexible for deploying an IaaS private cloud. Moreover, the performance experiments indicated some contrasts among the private IaaS cloud instances when running intensive workloads and scientific applications.}, keywords = {}, pubstate = {published}, tppubtype = {inproceedings} } Despite the evolution of cloud computing in recent years, the performance and comprehensive understanding of the available private cloud tools are still under research. This paper contributes to an analysis of the Infrastructure as a Service (IaaS) domain by mapping new insights and discussing the challenges for improving cloud services. The goal is to make a comparative analysis of OpenNebula, OpenStack and CloudStack tools, evaluating their differences on support for flexibility and resiliency. Also, we aim at evaluating these three cloud tools when they are deployed using a mutual hypervisor (KVM) for discovering new empirical insights. Our research results demonstrated that OpenStack is the most resilient and CloudStack is the most flexible for deploying an IaaS private cloud. Moreover, the performance experiments indicated some contrasts among the private IaaS cloud instances when running intensive workloads and scientific applications. |
Bairros, Gildomiro; Griebler, Dalvan; Fernandes, Luiz Gustavo Proposta de Suporte a Elasticidade Automática em Nuvem para uma Linguagem Específica de Domínio Inproceedings Escola Regional de Alto Desempenho (ERAD/RS), pp. 197-198, Sociedade Brasileira de Computação (SBC), São Leopoldo, RS, BR, 2016. @inproceedings{BAIRROS:ERAD:16, title = {Proposta de Suporte a Elasticidade Automática em Nuvem para uma Linguagem Específica de Domínio}, author = {Gildomiro Bairros and Dalvan Griebler and Luiz Gustavo Fernandes}, url = {https://gmap.pucrs.br/dalvan/papers/2016/CR_ERAD_PG__2016.pdf}, year = {2016}, date = {2016-04-01}, booktitle = {Escola Regional de Alto Desempenho (ERAD/RS)}, pages = {197-198}, publisher = {Sociedade Brasileira de Computação (SBC)}, address = {São Leopoldo, RS, BR}, abstract = {Este artigo apresenta uma proposta de desenvolvimento de um middleware para prover elasticidade para aplicações desenvolvidas com uma linguagem específica de domínio voltada para o paralelismo de stream. O middleware atuará a nível de PaaS e colocará instruções de elasticidade de forma transparente ao desenvolvedor, fazendo o parser do código e injetando automaticamente as instruções de elasticidade.}, keywords = {}, pubstate = {published}, tppubtype = {inproceedings} } Este artigo apresenta uma proposta de desenvolvimento de um middleware para prover elasticidade para aplicações desenvolvidas com uma linguagem específica de domínio voltada para o paralelismo de stream. O middleware atuará a nível de PaaS e colocará instruções de elasticidade de forma transparente ao desenvolvedor, fazendo o parser do código e injetando automaticamente as instruções de elasticidade. |
Maron, Carlos A F; Griebler, Dalvan; Fernandes, Luiz Gustavo Em Direção à um Benchmark de Workload Sintético para Paralelismo de Stream em Arquiteturas Multicore Inproceedings Escola Regional de Alto Desempenho (ERAD/RS), pp. 171-172, Sociedade Brasileira de Computação (SBC), São Leopoldo, RS, BR, 2016. @inproceedings{MARON:ERAD:16, title = {Em Direção à um Benchmark de Workload Sintético para Paralelismo de Stream em Arquiteturas Multicore}, author = {Carlos A. F. Maron and Dalvan Griebler and Luiz Gustavo Fernandes}, url = {https://gmap.pucrs.br/dalvan/papers/2016/CR_ERAD_PG_2016.pdf}, year = {2016}, date = {2016-04-01}, booktitle = {Escola Regional de Alto Desempenho (ERAD/RS)}, pages = {171-172}, publisher = {Sociedade Brasileira de Computação (SBC)}, address = {São Leopoldo, RS, BR}, abstract = {O processamento de fluxos contínuos de dados (stream) está provocando novos desafios na exploração de paralelismo. Suítes clássicas de benchmarks não exploram totalmente os aspectos de stream, focando-se em problemas de natureza científica e execução finita. Para endereçar este problema em ambientes de memória compartilhada, o trabalho propõe um benchmark de workload sintético voltado para paralelismo stream}, keywords = {}, pubstate = {published}, tppubtype = {inproceedings} } O processamento de fluxos contínuos de dados (stream) está provocando novos desafios na exploração de paralelismo. Suítes clássicas de benchmarks não exploram totalmente os aspectos de stream, focando-se em problemas de natureza científica e execução finita. Para endereçar este problema em ambientes de memória compartilhada, o trabalho propõe um benchmark de workload sintético voltado para paralelismo stream |
Ledur, Cleverson GMaVis: A Domain-Specific Language for Large-Scale Geospatial Data Visualization Supporting Multi-core Parallelism Masters Thesis Faculdade de Informática - PPGCC - PUCRS, 2016. @mastersthesis{LEDUR:DM:16, title = {GMaVis: A Domain-Specific Language for Large-Scale Geospatial Data Visualization Supporting Multi-core Parallelism}, author = {Cleverson Ledur}, url = {http://tede2.pucrs.br/tede2/handle/tede/6837}, year = {2016}, date = {2016-03-01}, address = {Porto Alegre, Brazil}, school = {Faculdade de Informática - PPGCC - PUCRS}, abstract = {Data generation has increased exponentially in recent years due to the popularization of technology. At the same time, information visualization enables the extraction of knowledge and useful information through data representation with graphic elements. Moreover, a set of visualization techniques may help in information perception, enabling finding patterns and anomalies in data. Even tought it provides many benefits, the information visualization creation is a hard task for users with a low knowledge in computer programming. It becomes more difficult when these users have to deal with big data files since most tools do not provide features to abstract data preprocessing. In order to bridge this gap, we proposed GMaVis. It is a Domain-Specific Language (DSL) that offers a high-level description language for creating geospatial data visualizations through a parallel data preprocessor and a high-level description language. GMaVis was evaluated using two approaches. First we performed a programming effort analysis, using an analytical software to estimate development effort based on the code. This evaluation demonstrates a high gain in productivity when compared with programming effort required by other tools and libraries with similar purposes. Also, a performance evaluation was conducted in the parallel module that performs data preprocessing, which demonstrated a performance gain when compared with the sequential version.}, keywords = {}, pubstate = {published}, tppubtype = {mastersthesis} } Data generation has increased exponentially in recent years due to the popularization of technology. At the same time, information visualization enables the extraction of knowledge and useful information through data representation with graphic elements. Moreover, a set of visualization techniques may help in information perception, enabling finding patterns and anomalies in data. Even tought it provides many benefits, the information visualization creation is a hard task for users with a low knowledge in computer programming. It becomes more difficult when these users have to deal with big data files since most tools do not provide features to abstract data preprocessing. In order to bridge this gap, we proposed GMaVis. It is a Domain-Specific Language (DSL) that offers a high-level description language for creating geospatial data visualizations through a parallel data preprocessor and a high-level description language. GMaVis was evaluated using two approaches. First we performed a programming effort analysis, using an analytical software to estimate development effort based on the code. This evaluation demonstrates a high gain in productivity when compared with programming effort required by other tools and libraries with similar purposes. Also, a performance evaluation was conducted in the parallel module that performs data preprocessing, which demonstrated a performance gain when compared with the sequential version. |
Griebler, Dalvan Domain-Specific Language & Support Tool for High-Level Stream Parallelism PhD Thesis Faculdade de Informática - PPGCC - PUCRS, 2016. @phdthesis{GRIEBLER:PHD:16, title = {Domain-Specific Language & Support Tool for High-Level Stream Parallelism}, author = {Dalvan Griebler}, url = {http://tede2.pucrs.br/tede2/handle/tede/6776}, year = {2016}, date = {2016-06-01}, address = {Porto Alegre, Brazil}, school = {Faculdade de Informática - PPGCC - PUCRS}, abstract = {Stream-based systems are representative of several application domains including video, audio, networking, graphic processing, etc. Stream programs may run on different kinds of parallel architectures (desktop, servers, cell phones, and supercomputers) and represent significant workloads on our current computing systems. Nevertheless, most of them are still not parallelized. Moreover, when new software has to be developed, programmers often face a trade-off between coding productivity, code portability, and performance. To solve this problem, we provide a new Domain-Specific Language (DSL) that naturally/on-the-fly captures and represents parallelism for stream-based applications. The aim is to offer a set of attributes (through annotations) that preserves the program's source code and is not architecture-dependent for annotating parallelism. We used the C++ attribute mechanism to design a ``textitde-facto'' standard C++ embedded DSL named SPar. However, the implementation of DSLs using compiler-based tools is difficult, complicated, and usually requires a significant learning curve. This is even harder for those who are not familiar with compiler technology. Therefore, our motivation is to simplify this path for other researchers (experts in their domain) with support tools (our tool is CINCLE) to create high-level and productive DSLs through powerful and aggressive source-to-source transformations. In fact, parallel programmers can use their expertise without having to design and implement low-level code. The main goal of this thesis was to create a DSL and support tools for high-level stream parallelism in the context of a programming framework that is compiler-based and domain-oriented. Thus, we implemented SPar using CINCLE. SPar supports the software developer with productivity, performance, and code portability while CINCLE provides sufficient support to generate new DSLs. Also, SPar targets source-to-source transformation producing parallel pattern code built on top of FastFlow and MPI. Finally, we provide a full set of experiments showing that SPar provides better coding productivity without significant performance degradation in multi-core systems as well as transformation rules that are able to achieve code portability (for cluster architectures) through its generalized attributes.}, keywords = {}, pubstate = {published}, tppubtype = {phdthesis} } Stream-based systems are representative of several application domains including video, audio, networking, graphic processing, etc. Stream programs may run on different kinds of parallel architectures (desktop, servers, cell phones, and supercomputers) and represent significant workloads on our current computing systems. Nevertheless, most of them are still not parallelized. Moreover, when new software has to be developed, programmers often face a trade-off between coding productivity, code portability, and performance. To solve this problem, we provide a new Domain-Specific Language (DSL) that naturally/on-the-fly captures and represents parallelism for stream-based applications. The aim is to offer a set of attributes (through annotations) that preserves the program's source code and is not architecture-dependent for annotating parallelism. We used the C++ attribute mechanism to design a ``textitde-facto'' standard C++ embedded DSL named SPar. However, the implementation of DSLs using compiler-based tools is difficult, complicated, and usually requires a significant learning curve. This is even harder for those who are not familiar with compiler technology. Therefore, our motivation is to simplify this path for other researchers (experts in their domain) with support tools (our tool is CINCLE) to create high-level and productive DSLs through powerful and aggressive source-to-source transformations. In fact, parallel programmers can use their expertise without having to design and implement low-level code. The main goal of this thesis was to create a DSL and support tools for high-level stream parallelism in the context of a programming framework that is compiler-based and domain-oriented. Thus, we implemented SPar using CINCLE. SPar supports the software developer with productivity, performance, and code portability while CINCLE provides sufficient support to generate new DSLs. Also, SPar targets source-to-source transformation producing parallel pattern code built on top of FastFlow and MPI. Finally, we provide a full set of experiments showing that SPar provides better coding productivity without significant performance degradation in multi-core systems as well as transformation rules that are able to achieve code portability (for cluster architectures) through its generalized attributes. |
Griebler, Dalvan Domain-Specific Language & Support Tool for High-Level Stream Parallelism PhD Thesis Computer Science Department - University of Pisa, 2016. @phdthesis{GRIEBLER:PHD_PISA:16, title = {Domain-Specific Language & Support Tool for High-Level Stream Parallelism}, author = {Dalvan Griebler}, url = {https://gmap.pucrs.br/dalvan/papers/2016/thesis_dalvan_UNIPI_2016.pdf}, year = {2016}, date = {2016-04-01}, address = {Pisa, Italy}, school = {Computer Science Department - University of Pisa}, abstract = {Stream-based systems are representative of several application domains including video, audio, networking, graphic processing, etc. Stream programs may run on different kinds of parallel architectures (desktop, servers, cell phones, and supercomputers) and represent significant workloads on our current computing systems. Nevertheless, most of them are still not parallelized. Moreover, when new software has to be developed, programmers often face a trade-off between coding productivity, code portability, and performance. To solve this problem, we provide a new Domain-Specific Language (DSL) that naturally/on-the-fly captures and represents parallelism for stream-based applications. The aim is to offer a set of attributes (through annotations) that preserves the program's source code and is not architecture-dependent for annotating parallelism. We used the C++ attribute mechanism to design a ``textitde-facto'' standard C++ embedded DSL named SPar. However, the implementation of DSLs using compiler-based tools is difficult, complicated, and usually requires a significant learning curve. This is even harder for those who are not familiar with compiler technology. Therefore, our motivation is to simplify this path for other researchers (experts in their domain) with support tools (our tool is CINCLE) to create high-level and productive DSLs through powerful and aggressive source-to-source transformations. In fact, parallel programmers can use their expertise without having to design and implement low-level code. The main goal of this thesis was to create a DSL and support tools for high-level stream parallelism in the context of a programming framework that is compiler-based and domain-oriented. Thus, we implemented SPar using CINCLE. SPar supports the software developer with productivity, performance, and code portability while CINCLE provides sufficient support to generate new DSLs. Also, SPar targets source-to-source transformation producing parallel pattern code built on top of FastFlow and MPI. Finally, we provide a full set of experiments showing that SPar provides better coding productivity without significant performance degradation in multi-core systems as well as transformation rules that are able to achieve code portability (for cluster architectures) through its generalized attributes.}, keywords = {}, pubstate = {published}, tppubtype = {phdthesis} } Stream-based systems are representative of several application domains including video, audio, networking, graphic processing, etc. Stream programs may run on different kinds of parallel architectures (desktop, servers, cell phones, and supercomputers) and represent significant workloads on our current computing systems. Nevertheless, most of them are still not parallelized. Moreover, when new software has to be developed, programmers often face a trade-off between coding productivity, code portability, and performance. To solve this problem, we provide a new Domain-Specific Language (DSL) that naturally/on-the-fly captures and represents parallelism for stream-based applications. The aim is to offer a set of attributes (through annotations) that preserves the program's source code and is not architecture-dependent for annotating parallelism. We used the C++ attribute mechanism to design a ``textitde-facto'' standard C++ embedded DSL named SPar. However, the implementation of DSLs using compiler-based tools is difficult, complicated, and usually requires a significant learning curve. This is even harder for those who are not familiar with compiler technology. Therefore, our motivation is to simplify this path for other researchers (experts in their domain) with support tools (our tool is CINCLE) to create high-level and productive DSLs through powerful and aggressive source-to-source transformations. In fact, parallel programmers can use their expertise without having to design and implement low-level code. The main goal of this thesis was to create a DSL and support tools for high-level stream parallelism in the context of a programming framework that is compiler-based and domain-oriented. Thus, we implemented SPar using CINCLE. SPar supports the software developer with productivity, performance, and code portability while CINCLE provides sufficient support to generate new DSLs. Also, SPar targets source-to-source transformation producing parallel pattern code built on top of FastFlow and MPI. Finally, we provide a full set of experiments showing that SPar provides better coding productivity without significant performance degradation in multi-core systems as well as transformation rules that are able to achieve code portability (for cluster architectures) through its generalized attributes. |
2015 |
Adornes, Daniel; Griebler, Dalvan; Ledur, Cleverson; Fernandes, Luiz G Coding Productivity in MapReduce Applications for Distributed and Shared Memory Architectures Journal Article doi International Journal of Software Engineering and Knowledge Engineering, 25 (10), pp. 1739-1741, 2015. @article{ADORNES:IJSEKE:15, title = {Coding Productivity in MapReduce Applications for Distributed and Shared Memory Architectures}, author = {Daniel Adornes and Dalvan Griebler and Cleverson Ledur and Luiz G. Fernandes}, url = {http://dx.doi.org/10.1142/S0218194015710096}, doi = {10.1142/S0218194015710096}, year = {2015}, date = {2015-12-01}, journal = {International Journal of Software Engineering and Knowledge Engineering}, volume = {25}, number = {10}, pages = {1739-1741}, publisher = {World Scientific}, abstract = {MapReduce was originally proposed as a suitable and efficient approach for analyzing and processing large amounts of data. Since then, many researches contributed with MapReduce implementations for distributed and shared memory architectures. Nevertheless, different architectural levels require different optimization strategies in order to achieve high-performance computing. Such strategies in turn have caused very different MapReduce programming interfaces among these researches. This paper presents some research notes on coding productivity when developing MapReduce applications for distributed and shared memory architectures. As a case study, we introduce our current research on a unified MapReduce domain-specific language with code generation for Hadoop and Phoenix++, which has achieved a coding productivity increase from 41.84% and up to 94.71% without significant performance losses (below 3%) compared to those frameworks.}, keywords = {}, pubstate = {published}, tppubtype = {article} } MapReduce was originally proposed as a suitable and efficient approach for analyzing and processing large amounts of data. Since then, many researches contributed with MapReduce implementations for distributed and shared memory architectures. Nevertheless, different architectural levels require different optimization strategies in order to achieve high-performance computing. Such strategies in turn have caused very different MapReduce programming interfaces among these researches. This paper presents some research notes on coding productivity when developing MapReduce applications for distributed and shared memory architectures. As a case study, we introduce our current research on a unified MapReduce domain-specific language with code generation for Hadoop and Phoenix++, which has achieved a coding productivity increase from 41.84% and up to 94.71% without significant performance losses (below 3%) compared to those frameworks. |
Carmo, Andriele Busattodo; Raeder, Mateus; Nunes, Thiago; Kolberg, Mariana; Fernandes, Luiz Gustavo A job profile oriented scheduling architecture for improving the throughput of industrial printing environments Journal Article doi Computers & Industrial Engineering, 88 , pp. 191-205, 2015. @article{gmap:CARMO:CIE:15, title = {A job profile oriented scheduling architecture for improving the throughput of industrial printing environments}, author = {Andriele Busattodo Carmo and Mateus Raeder and Thiago Nunes and Mariana Kolberg and Luiz Gustavo Fernandes}, url = {https://doi.org/10.1016/j.cie.2015.07.001}, doi = {10.1016/j.cie.2015.07.001}, year = {2015}, date = {2015-10-01}, journal = {Computers & Industrial Engineering}, volume = {88}, pages = {191-205}, publisher = {Elsevier}, abstract = {The Digital Printing industry has become extremely specialized in the past few years. The use of personalized documents has emerged as a consolidated trend in this field. In order to meet this demand, languages to describe templates for personalized documents were proposed along with procedures which allow the correct printing of such documents. One of these procedures, which demands a high computational effort, is the ripping phase performed over a queue of documents in order to convert them into a printable format. An alternative to decrease the ripping phase computational time is to use high performance computing techniques to allow parallel ripping of different documents. However, such strategies present several unsolved issues. One of the most severe issues is the impossibility to assure a fair load balancing for any job queue. In this scenario, this work proposes a job profile oriented scheduling architecture for improving the throughput of industrial printing environments through a more efficient use of the available resources. Our results show a performance gain of up to 10% in average over the previous existing strategies applied on different job queue scenarios.}, keywords = {}, pubstate = {published}, tppubtype = {article} } The Digital Printing industry has become extremely specialized in the past few years. The use of personalized documents has emerged as a consolidated trend in this field. In order to meet this demand, languages to describe templates for personalized documents were proposed along with procedures which allow the correct printing of such documents. One of these procedures, which demands a high computational effort, is the ripping phase performed over a queue of documents in order to convert them into a printable format. An alternative to decrease the ripping phase computational time is to use high performance computing techniques to allow parallel ripping of different documents. However, such strategies present several unsolved issues. One of the most severe issues is the impossibility to assure a fair load balancing for any job queue. In this scenario, this work proposes a job profile oriented scheduling architecture for improving the throughput of industrial printing environments through a more efficient use of the available resources. Our results show a performance gain of up to 10% in average over the previous existing strategies applied on different job queue scenarios. |
Adornes, Daniel; Griebler, Dalvan; Ledur, Cleverson; Fernandes, Luiz G A Unified MapReduce Domain-Specific Language for Distributed and Shared Memory Architectures Inproceedings doi The 27th International Conference on Software Engineering & Knowledge Engineering, pp. 6, Knowledge Systems Institute Graduate School, Pittsburgh, USA, 2015. @inproceedings{ADORNES:SEKE:15, title = {A Unified MapReduce Domain-Specific Language for Distributed and Shared Memory Architectures}, author = {Daniel Adornes and Dalvan Griebler and Cleverson Ledur and Luiz G. Fernandes}, url = {http://dx.doi.org/10.18293/SEKE2015-204}, doi = {10.18293/SEKE2015-204}, year = {2015}, date = {2015-07-01}, booktitle = {The 27th International Conference on Software Engineering & Knowledge Engineering}, pages = {6}, publisher = {Knowledge Systems Institute Graduate School}, address = {Pittsburgh, USA}, abstract = {MapReduce is a suitable and efficient parallel programming pattern for processing big data analysis. In recent years, many frameworks/languages have implemented this pattern to achieve high performance in data mining applications, particularly for distributed memory architectures (e.g., clusters). Nevertheless, the industry of processors is now able to offer powerful processing on single machines (e.g., multi-core). Thus, these applications may address the parallelism in another architectural level. The target problems of this paper are code reuse and programming effort reduction since current solutions do not provide a single interface to deal with these two architectural levels. Therefore, we propose a unified domain-specific language in conjunction with transformation rules for code generation for Hadoop and Phoenix++. We selected these frameworks as state-of-the-art MapReduce implementations for distributed and shared memory architectures, respectively. Our solution achieves a programming effort reduction from 41.84% and up to 95.43% without significant performance losses (below the threshold of 3%) compared to Hadoop and Phoenix++.}, keywords = {}, pubstate = {published}, tppubtype = {inproceedings} } MapReduce is a suitable and efficient parallel programming pattern for processing big data analysis. In recent years, many frameworks/languages have implemented this pattern to achieve high performance in data mining applications, particularly for distributed memory architectures (e.g., clusters). Nevertheless, the industry of processors is now able to offer powerful processing on single machines (e.g., multi-core). Thus, these applications may address the parallelism in another architectural level. The target problems of this paper are code reuse and programming effort reduction since current solutions do not provide a single interface to deal with these two architectural levels. Therefore, we propose a unified domain-specific language in conjunction with transformation rules for code generation for Hadoop and Phoenix++. We selected these frameworks as state-of-the-art MapReduce implementations for distributed and shared memory architectures, respectively. Our solution achieves a programming effort reduction from 41.84% and up to 95.43% without significant performance losses (below the threshold of 3%) compared to Hadoop and Phoenix++. |
Griebler, Dalvan; Danelutto, Marco; Torquati, Massimo; Fernandes, Luiz G An Embedded C++ Domain-Specific Language for Stream Parallelism Inproceedings doi Parallel Computing: On the Road to Exascale, Proceedings of the International Conference on Parallel Computing, pp. 317-326, IOS Press, Edinburgh, Scotland, UK, 2015. @inproceedings{GRIEBLER:PARCO:15, title = {An Embedded C++ Domain-Specific Language for Stream Parallelism}, author = {Dalvan Griebler and Marco Danelutto and Massimo Torquati and Luiz G. Fernandes}, url = {http://dx.doi.org/10.3233/978-1-61499-621-7-317}, doi = {10.3233/978-1-61499-621-7-317}, year = {2015}, date = {2015-09-01}, booktitle = {Parallel Computing: On the Road to Exascale, Proceedings of the International Conference on Parallel Computing}, pages = {317-326}, publisher = {IOS Press}, address = {Edinburgh, Scotland, UK}, series = {ParCo'15}, abstract = {This paper proposes a new C++ embedded Domain-Specific Language (DSL) for expressing stream parallelism by using standard C++11 attributes annotations. The main goal is to introduce high-level parallel abstractions for developing stream based parallel programs as well as reducing sequential source code rewriting. We demonstrated that by using a small set of attributes it is possible to produce different parallel versions depending on the way the source code is annotated. The performances of the parallel code produced are comparable with those obtained by manual parallelization.}, keywords = {}, pubstate = {published}, tppubtype = {inproceedings} } This paper proposes a new C++ embedded Domain-Specific Language (DSL) for expressing stream parallelism by using standard C++11 attributes annotations. The main goal is to introduce high-level parallel abstractions for developing stream based parallel programs as well as reducing sequential source code rewriting. We demonstrated that by using a small set of attributes it is possible to produce different parallel versions depending on the way the source code is annotated. The performances of the parallel code produced are comparable with those obtained by manual parallelization. |
Ledur, Cleverson; Griebler, Dalvan; Manssour, Isabel; Fernandes, Luiz G Towards a Domain-Specific Language for Geospatial Data Visualization Maps with Big Data Sets Inproceedings doi ACS/IEEE International Conference on Computer Systems and Applications, pp. 8, IEEE, Marrakech, Marrocos, 2015. @inproceedings{LEDUR:AICCSA:15, title = {Towards a Domain-Specific Language for Geospatial Data Visualization Maps with Big Data Sets}, author = {Cleverson Ledur and Dalvan Griebler and Isabel Manssour and Luiz G. Fernandes}, url = {http://dx.doi.org/10.1109/AICCSA.2015.7507178}, doi = {10.1109/AICCSA.2015.7507178}, year = {2015}, date = {2015-11-01}, booktitle = {ACS/IEEE International Conference on Computer Systems and Applications}, pages = {8}, publisher = {IEEE}, address = {Marrakech, Marrocos}, series = {AICCSA'15}, abstract = {Data visualization is an alternative for representing information and helping people gain faster insights. However, the programming/creating of a visualization for large data sets is still a challenging task for users with low-level of software development knowledge. Our goal is to increase the productivity of experts who are familiar with the application domain. Therefore, we proposed an external Domain-Specific Language (DSL) that allows massive input of raw data and provides a small dictionary with suitable data visualization keywords. Also, we implemented it to support efficient data filtering operations and generate HTML or Javascript output code files (using Google Maps API). To measure the potential of our DSL, we evaluated four types of geospatial data visualization maps with four different technologies. The experiment results demonstrated a productivity gain when compared to the traditional way of implementing (e.g., Google Maps API, OpenLayers, and Leaflet), and efficient algorithm implementation.}, keywords = {}, pubstate = {published}, tppubtype = {inproceedings} } Data visualization is an alternative for representing information and helping people gain faster insights. However, the programming/creating of a visualization for large data sets is still a challenging task for users with low-level of software development knowledge. Our goal is to increase the productivity of experts who are familiar with the application domain. Therefore, we proposed an external Domain-Specific Language (DSL) that allows massive input of raw data and provides a small dictionary with suitable data visualization keywords. Also, we implemented it to support efficient data filtering operations and generate HTML or Javascript output code files (using Google Maps API). To measure the potential of our DSL, we evaluated four types of geospatial data visualization maps with four different technologies. The experiment results demonstrated a productivity gain when compared to the traditional way of implementing (e.g., Google Maps API, OpenLayers, and Leaflet), and efficient algorithm implementation. |
Ledur, Cleverson; Griebler, Dalvan; Fernandes, Luiz Gustavo; Manssour, Isabel Uma Linguagem Específica de Domínio com Geração de Código Paralelo para Visualização de Grandes Volumes de Dados Inproceedings Escola Regional de Alto Desempenho (ERAD/RS), pp. 139-140, Sociedade Brasileira de Computação (SBC), Gramado, RS, BR, 2015. @inproceedings{LEDUR:ERAD:15, title = {Uma Linguagem Específica de Domínio com Geração de Código Paralelo para Visualização de Grandes Volumes de Dados}, author = {Cleverson Ledur and Dalvan Griebler and Luiz Gustavo Fernandes and Isabel Manssour}, url = {https://gmap.pucrs.br/dalvan/papers/2015/CR_ERAD_PG_2015.pdf}, year = {2015}, date = {2015-04-01}, booktitle = {Escola Regional de Alto Desempenho (ERAD/RS)}, pages = {139-140}, publisher = {Sociedade Brasileira de Computação (SBC)}, address = {Gramado, RS, BR}, abstract = {Este artigo apresenta uma análise sobre linguagens específicas de domínio para a criação de visualizações. Ao final, propõe uma nova linguagem específica de domínio para geração de visualizações de quantidades massivas de dados, paralelizando não só a geração e a interação da visualização, mas também o pré-processamento dos dados brutos.}, keywords = {}, pubstate = {published}, tppubtype = {inproceedings} } Este artigo apresenta uma análise sobre linguagens específicas de domínio para a criação de visualizações. Ao final, propõe uma nova linguagem específica de domínio para geração de visualizações de quantidades massivas de dados, paralelizando não só a geração e a interação da visualização, mas também o pré-processamento dos dados brutos. |
Adornes, Daniel A Unified MapReduce Programming Interface for Multi-Core and Distributed Architectures Masters Thesis Faculdade de Informática - PPGCC - PUCRS, 2015. @mastersthesis{ADORNES:DM:15, title = {A Unified MapReduce Programming Interface for Multi-Core and Distributed Architectures}, author = {Daniel Adornes}, url = {http://tede2.pucrs.br/tede2/handle/tede/6782}, year = {2015}, date = {2015-03-01}, address = {Porto Alegre, Brazil}, school = {Faculdade de Informática - PPGCC - PUCRS}, abstract = {In order to improve performance, simplicity and scalability of large datasets processing, Google proposed the MapReduce parallel pattern. This pattern has been implemented in several ways for different architectural levels, achieving significant results for high performance computing.However, developing optimized code with those solutions requires specialized knowledge in each framework's interface and programming language. Recently, the DSL-POPP was proposed as a framework with a high-level language for patterns-oriented parallel programming, aimed at abstracting complexities of parallel and distributed code. Inspired on DSL-POPP, this work proposes the implementation of a unified MapReduce programming interface with rules for code transformation to optimized solutions for shared-memory multi-core and distributed architectures. The evaluation demonstrates that the proposed interface is able to avoid performance losses, while also achieving a code and a development cost reduction from 41.84% to 96.48%. Moreover, the construction of the code generator, the compatibility with other MapReduce solutions and the extension of DSL-POPP with the MapReduce pattern are proposed as future work.}, keywords = {}, pubstate = {published}, tppubtype = {mastersthesis} } In order to improve performance, simplicity and scalability of large datasets processing, Google proposed the MapReduce parallel pattern. This pattern has been implemented in several ways for different architectural levels, achieving significant results for high performance computing.However, developing optimized code with those solutions requires specialized knowledge in each framework's interface and programming language. Recently, the DSL-POPP was proposed as a framework with a high-level language for patterns-oriented parallel programming, aimed at abstracting complexities of parallel and distributed code. Inspired on DSL-POPP, this work proposes the implementation of a unified MapReduce programming interface with rules for code transformation to optimized solutions for shared-memory multi-core and distributed architectures. The evaluation demonstrates that the proposed interface is able to avoid performance losses, while also achieving a code and a development cost reduction from 41.84% to 96.48%. Moreover, the construction of the code generator, the compatibility with other MapReduce solutions and the extension of DSL-POPP with the MapReduce pattern are proposed as future work. |
2014 |
Griebler, Dalvan; Adornes, Daniel; Fernandes, Luiz G Performance and Usability Evaluation of a Pattern-Oriented Parallel Programming Interface for Multi-Core Architectures Inproceedings The 26th International Conference on Software Engineering & Knowledge Engineering, pp. 25-30, Knowledge Systems Institute Graduate School, Vancouver, Canada, 2014. @inproceedings{GRIEBLER:SEKE:14, title = {Performance and Usability Evaluation of a Pattern-Oriented Parallel Programming Interface for Multi-Core Architectures}, author = {Dalvan Griebler and Daniel Adornes and Luiz G. Fernandes}, url = {https://gmap.pucrs.br/dalvan/papers/2014/CR_SEKE_2014.pdf}, year = {2014}, date = {2014-07-01}, booktitle = {The 26th International Conference on Software Engineering & Knowledge Engineering}, pages = {25-30}, publisher = {Knowledge Systems Institute Graduate School}, address = {Vancouver, Canada}, abstract = {Multi-core architectures have increased the power of parallelism by coupling many cores in a single chip. This becomes even more complex for developers to exploit the avail-able parallelism in order to provide high performance scalable programs. To address these challenges, we propose the DSL-POPP (Domain-Specific Language for Pattern-Oriented Parallel Programming), which links the pattern-based approach in the programming interface as an alternative to reduce the effort of parallel software development, and achieve good performance in some applications. In this paper, the objective is to evaluate the usability and performance of the master/slave pattern and compare it to the Pthreads library. Moreover, experiments have shown that the master/slave interface of the DSL-POPP reduces up to 50% of the programming effort, without significantly affecting the performance.}, keywords = {}, pubstate = {published}, tppubtype = {inproceedings} } Multi-core architectures have increased the power of parallelism by coupling many cores in a single chip. This becomes even more complex for developers to exploit the avail-able parallelism in order to provide high performance scalable programs. To address these challenges, we propose the DSL-POPP (Domain-Specific Language for Pattern-Oriented Parallel Programming), which links the pattern-based approach in the programming interface as an alternative to reduce the effort of parallel software development, and achieve good performance in some applications. In this paper, the objective is to evaluate the usability and performance of the master/slave pattern and compare it to the Pthreads library. Moreover, experiments have shown that the master/slave interface of the DSL-POPP reduces up to 50% of the programming effort, without significantly affecting the performance. |
Kolberg, Mariana; Fernandes, Luiz Gustavo; Raeder, Mateus; Fonseca, Carolina JAR tool: using document analysis for improving the throughput of high performance printing environments Inproceedings doi ACM symposium on Document engineering, pp. 175-178, ACM, New York, NY, USA, 2014. @inproceedings{gmap:KOLBERG:DocEng:14, title = {JAR tool: using document analysis for improving the throughput of high performance printing environments}, author = {Mariana Kolberg and Luiz Gustavo Fernandes and Mateus Raeder and Carolina Fonseca}, url = {https://doi.org/10.1145/2644866.2644887}, doi = {10.1145/2644866.2644887}, year = {2014}, date = {2014-09-01}, booktitle = {ACM symposium on Document engineering}, pages = {175-178}, publisher = {ACM}, address = {New York, NY, USA}, series = {DocEng'14}, abstract = {Digital printers have consistently improved their speed in the past years. Meanwhile, the need for document personalization and customization has increased. As a consequence of these two facts, the traditional rasterization process has become a highly demanding computational step in the printing workflow. Moreover, Print Service Providers are now using multiple RIP engines to speed up the whole document rasterization process, and depending on the input document characteristics the rasterization process may not achieve the print-engine speed creating a unwanted bottleneck. In this scenario, we developed a tool called Job Adaptive Router (JAR) aiming at improving the throughput of the rasterization process through a clever load balance among RIP engines which is based on information obtained by the analysis of input documents content. Furthermore, along with this tool we propose some strategies that consider relevant characteristics of documents, such as transparency and reusability of images, to split the job in a more intelligent way. The obtained results confirm that the use of the proposed tool improved the rasterization process performance.}, keywords = {}, pubstate = {published}, tppubtype = {inproceedings} } Digital printers have consistently improved their speed in the past years. Meanwhile, the need for document personalization and customization has increased. As a consequence of these two facts, the traditional rasterization process has become a highly demanding computational step in the printing workflow. Moreover, Print Service Providers are now using multiple RIP engines to speed up the whole document rasterization process, and depending on the input document characteristics the rasterization process may not achieve the print-engine speed creating a unwanted bottleneck. In this scenario, we developed a tool called Job Adaptive Router (JAR) aiming at improving the throughput of the rasterization process through a clever load balance among RIP engines which is based on information obtained by the analysis of input documents content. Furthermore, along with this tool we propose some strategies that consider relevant characteristics of documents, such as transparency and reusability of images, to split the job in a more intelligent way. The obtained results confirm that the use of the proposed tool improved the rasterization process performance. |
do Carmo, Andriele Busatto; Fernandes, Luiz G L Efeitos do Balanceamento de Carga no Consumo de Energia de Clusters de Computadores Heterogêneos Inproceedings XIV Escola Regional de Alto Desempenho da Região Sul (ERAD-RS), pp. 99-100, Sociedade Brasileira de Computação (SBC), Alegrete, BR, 2014. @inproceedings{gmap:CARMO:ERAD:14, title = {Efeitos do Balanceamento de Carga no Consumo de Energia de Clusters de Computadores Heterogêneos}, author = {Andriele Busatto do Carmo and Luiz G L Fernandes}, url = {https://gmap.pucrs.br/gmap/files/publications/articles/f1bb4afe2b05a4cb9694e72b1dfc952a.pdf}, year = {2014}, date = {2014-03-01}, booktitle = {XIV Escola Regional de Alto Desempenho da Região Sul (ERAD-RS)}, pages = {99-100}, publisher = {Sociedade Brasileira de Computação (SBC)}, address = {Alegrete, BR}, keywords = {}, pubstate = {published}, tppubtype = {inproceedings} } |
Rui, Fernando; Castro, Márcio; Griebler, Dalvan; Fernandes, Luiz Gustavo Evaluating the Impact of Transactional Characteristics on the Performance of Transactional Memory Applications Inproceedings doi 22nd Euromicro International Conference on Parallel, Distributed, and Network-Based Processing, pp. 93-97, IEEE, Torino, Italy, 2014. @inproceedings{gmap:RUI:PDP:14, title = {Evaluating the Impact of Transactional Characteristics on the Performance of Transactional Memory Applications}, author = {Fernando Rui and Márcio Castro and Dalvan Griebler and Luiz Gustavo Fernandes}, url = {https://doi.org/10.1109/PDP.2014.57}, doi = {10.1109/PDP.2014.57}, year = {2014}, date = {2014-02-01}, booktitle = {22nd Euromicro International Conference on Parallel, Distributed, and Network-Based Processing}, pages = {93-97}, publisher = {IEEE}, address = {Torino, Italy}, series = {PDP'14}, abstract = {Transactional Memory (TM) is reputed by many researchers to be a promising solution to ease parallel programming on multicore processors. This model provides the scalability of fine-grained locking while avoiding common issues of traditional mechanisms, such as deadlocks. During these almost twenty years of research, several TM systems and benchmarks have been proposed. However, TM is not yet widely adopted by the scientific community to develop parallel applications due to unanswered questions in the literature, such as "how to identify if a parallel application can exploit TM to achieve better performance?" or "what are the reasons of poor performances of some TM applications?". In this work, we contribute to answer those questions through a comparative evaluation of a set of TM applications on four different state- of-the-art TM systems. Moreover, we identify some of the most important TM characteristics that impact directly the performance of TM applications. Our results can be useful to identify opportunities for optimizations.}, keywords = {}, pubstate = {published}, tppubtype = {inproceedings} } Transactional Memory (TM) is reputed by many researchers to be a promising solution to ease parallel programming on multicore processors. This model provides the scalability of fine-grained locking while avoiding common issues of traditional mechanisms, such as deadlocks. During these almost twenty years of research, several TM systems and benchmarks have been proposed. However, TM is not yet widely adopted by the scientific community to develop parallel applications due to unanswered questions in the literature, such as "how to identify if a parallel application can exploit TM to achieve better performance?" or "what are the reasons of poor performances of some TM applications?". In this work, we contribute to answer those questions through a comparative evaluation of a set of TM applications on four different state- of-the-art TM systems. Moreover, we identify some of the most important TM characteristics that impact directly the performance of TM applications. Our results can be useful to identify opportunities for optimizations. |
2013 |
Castro, Márcio; Velho, Pedro; Fernandes, Luiz Gustavo; Méhaut, Jean-François A Parallel Approach to Fine-tune Field Emission Displays Using a Genetic Algorithm Journal Article Latin American Conference on High Performance Computing (CLCAR), 2013. @article{CAS13CLCAR, title = {A Parallel Approach to Fine-tune Field Emission Displays Using a Genetic Algorithm}, author = {Márcio Castro and Pedro Velho and Luiz Gustavo Fernandes and Jean-François Méhaut}, year = {2013}, date = {2013-01-01}, journal = {Latin American Conference on High Performance Computing (CLCAR)}, address = {San José, Costa Rica}, keywords = {}, pubstate = {published}, tppubtype = {article} } |
Griebler, Dalvan; Fernandes, Luiz G Towards a Domain-Specific Language for Patterns-Oriented Parallel Programming Inproceedings doi Programming Languages - 17th Brazilian Symposium - SBLP, pp. 105-119, Springer Berlin Heidelberg, Brasilia, Brazil, 2013. @inproceedings{GRIEBLER:SBLP:13, title = {Towards a Domain-Specific Language for Patterns-Oriented Parallel Programming}, author = {Dalvan Griebler and Luiz G. Fernandes}, url = {http://dx.doi.org/10.1007/978-3-642-40922-6_8}, doi = {10.1007/978-3-642-40922-6_8}, year = {2013}, date = {2013-10-01}, booktitle = {Programming Languages - 17th Brazilian Symposium - SBLP}, volume = {8129}, pages = {105-119}, publisher = {Springer Berlin Heidelberg}, address = {Brasilia, Brazil}, series = {Lecture Notes in Computer Science}, abstract = {Pattern-oriented programming has been used in parallel code development for many years now. During this time, several tools (mainly frameworks and libraries) proposed the use of patterns based on programming primitives or templates. The implementation of patterns using those tools usually requires human expertise to correctly set up communication/synchronization among processes. In this work, we propose the use of a Domain Specific Language to create pattern-oriented parallel programs (DSL-POPP). This approach has the advantage of offering a higher programming abstraction level in which communication/synchronization among processes is hidden from programmers. We compensate the reduction in programming flexibility offering the possibility to use combined and/or nested parallel patterns (i.e., parallelism in levels), allowing the design of more complex parallel applications. We conclude this work presenting an experiment in which we develop a parallel application exploiting combined and nested parallel patterns in order to demonstrate the main properties of DSL-POPP.}, keywords = {}, pubstate = {published}, tppubtype = {inproceedings} } Pattern-oriented programming has been used in parallel code development for many years now. During this time, several tools (mainly frameworks and libraries) proposed the use of patterns based on programming primitives or templates. The implementation of patterns using those tools usually requires human expertise to correctly set up communication/synchronization among processes. In this work, we propose the use of a Domain Specific Language to create pattern-oriented parallel programs (DSL-POPP). This approach has the advantage of offering a higher programming abstraction level in which communication/synchronization among processes is hidden from programmers. We compensate the reduction in programming flexibility offering the possibility to use combined and/or nested parallel patterns (i.e., parallelism in levels), allowing the design of more complex parallel applications. We conclude this work presenting an experiment in which we develop a parallel application exploiting combined and nested parallel patterns in order to demonstrate the main properties of DSL-POPP. |
Griebler, Dalvan; Fernandes, Luiz Gustavo DSL-POPP: Linguagem Específica de Domínio para Programação Paralela Orientada a Padrões Inproceedings Escola Regional de Alto Desempenho (ERAD/RS), pp. 2, Sociedade Brasileira de Computação (SBC), Porto Alegre, RS, BR, 2013. @inproceedings{GRIEBLER:ERAD:13, title = {DSL-POPP: Linguagem Específica de Domínio para Programação Paralela Orientada a Padrões}, author = {Dalvan Griebler and Luiz Gustavo Fernandes}, url = {https://gmap.pucrs.br/dalvan/papers/2013/CR_ERAD_2013.pdf}, year = {2013}, date = {2013-03-01}, booktitle = {Escola Regional de Alto Desempenho (ERAD/RS)}, pages = {2}, publisher = {Sociedade Brasileira de Computação (SBC)}, address = {Porto Alegre, RS, BR}, abstract = {A proposta deste trabalho é induzir o programador a desenvolver programas orientados a padrões paralelos, que implementados na interface de uma linguagem específica de domínio ajudam a reduzir o esforço de programação sem comprometer o desempenho de uma aplicação. Resultados experimentais com o padrão mestre/escravo mostraram um bom desempenho nos algoritmos paralelizados.}, keywords = {}, pubstate = {published}, tppubtype = {inproceedings} } A proposta deste trabalho é induzir o programador a desenvolver programas orientados a padrões paralelos, que implementados na interface de uma linguagem específica de domínio ajudam a reduzir o esforço de programação sem comprometer o desempenho de uma aplicação. Resultados experimentais com o padrão mestre/escravo mostraram um bom desempenho nos algoritmos paralelizados. |
Teodoro, Silvana; do Carmo, Andriele Busatto; Fernandes, Luiz Gustavo Energy Efficiency Management in Computational Grids Through Energy-aware Scheduling Inproceedings doi Proceedings of the 28th Annual ACM Symposium on Applied Computing, pp. 1163–1168, ACM, Coimbra, Portugal, 2013, ISBN: 978-1-4503-1656-9. @inproceedings{Teodoro:2013:EEM:2480362.2480581, title = {Energy Efficiency Management in Computational Grids Through Energy-aware Scheduling}, author = {Silvana Teodoro and Andriele Busatto do Carmo and Luiz Gustavo Fernandes}, url = {http://doi.acm.org/10.1145/2480362.2480581}, doi = {10.1145/2480362.2480581}, isbn = {978-1-4503-1656-9}, year = {2013}, date = {2013-01-01}, booktitle = {Proceedings of the 28th Annual ACM Symposium on Applied Computing}, pages = {1163--1168}, publisher = {ACM}, address = {Coimbra, Portugal}, series = {SAC '13}, keywords = {}, pubstate = {published}, tppubtype = {inproceedings} } |
Lara, Viviane L; Kolberg, Mariana ; Fernandes, Luiz Gustavo 13a Escola Regional de Alto Desempenho (ERAD), pp. 107-108, Sociedade Brasileira de Computação, Porto Alegre, Brazil, 2013. @inproceedings{LAR13ERAD, title = {Resolução Paralela Verificada de Sistemas de Equações Lineares: uma Análise do Impacto no Desempenho da Técnica DVFS para Eficiência Energética}, author = {Lara, Viviane L and Kolberg, Mariana and Fernandes, Luiz Gustavo}, url = {https://gmap.pucrs.br/gmap/files/publications/articles/432ba2a7ccec14f69cb4bf27afcf792b.pdf}, year = {2013}, date = {2013-03-01}, booktitle = {13a Escola Regional de Alto Desempenho (ERAD)}, pages = {107-108}, publisher = {Sociedade Brasileira de Computação}, address = {Porto Alegre, Brazil}, keywords = {}, pubstate = {published}, tppubtype = {inproceedings} } |
Teodoro, Silvana Algoritmos de Escalonamento para Grades Computacionais voltados à Eficiência Energética Masters Thesis PUCRS, 2013. @mastersthesis{TEODORO:DM:13, title = {Algoritmos de Escalonamento para Grades Computacionais voltados à Eficiência Energética}, author = {Silvana Teodoro}, url = {https://gmap.pucrs.br/gmap/files/publications/articles/42fed21d426d0772e6f918691f47833c.pdf}, year = {2013}, date = {2013-01-01}, address = {Porto Alegre, Brazil}, school = {PUCRS}, keywords = {}, pubstate = {published}, tppubtype = {mastersthesis} } |
Lara, Viviane Linck Resolução Paralela Verificada de Sistemas de Equações Lineares: Uma Abordagem para Eficiência Energética Utilizando DVFS Masters Thesis PUCRS, 2013. @mastersthesis{LARA:DM:13, title = {Resolução Paralela Verificada de Sistemas de Equações Lineares: Uma Abordagem para Eficiência Energética Utilizando DVFS}, author = {Viviane Linck Lara}, url = {http://repositorio.pucrs.br/dspace/handle/10923/7793}, year = {2013}, date = {2013-01-01}, address = {Porto Alegre, Brazil}, school = {PUCRS}, keywords = {}, pubstate = {published}, tppubtype = {mastersthesis} } |
2012 |
Castro, Márcio ; Góes, Luís Fabrício Wanderley ; Fernandes, Luiz Gustavo ; Méhaut, Jean-François Dynamic Thread Mapping Based on Machine Learning for Transactional Memory Applications Inproceedings doi 18th International Conference, Euro-Par, pp. 465-476, Springer Berlin Heidelberg, Rhodes Island, Greece, 2012. @inproceedings{CAS12EUROPAR, title = {Dynamic Thread Mapping Based on Machine Learning for Transactional Memory Applications}, author = {Castro, Márcio and Góes, Luís Fabrício Wanderley and Fernandes, Luiz Gustavo and Méhaut, Jean-François}, doi = {10.1007/978-3-642-32820-6_47}, year = {2012}, date = {2012-08-01}, booktitle = {18th International Conference, Euro-Par}, pages = {465-476}, publisher = {Springer Berlin Heidelberg}, address = {Rhodes Island, Greece}, keywords = {}, pubstate = {published}, tppubtype = {inproceedings} } |
Griebler, Dalvan Faculdade de Informática - PPGCC - PUCRS, 2012. @mastersthesis{GRIEBLER:DM:12, title = {Proposta de uma Linguagem Específica de Domínio de Programação Paralela Orientada a Padrões Paralelos: Um Estudo de Caso Baseado no Padrão Mestre/Escravo para Arquiteturas Multi-Core}, author = {Dalvan Griebler}, url = {http://tede.pucrs.br/tde_busca/arquivo.php?codArquivo=4265}, year = {2012}, date = {2012-03-01}, address = {Porto Alegre, Brazil}, school = {Faculdade de Informática - PPGCC - PUCRS}, abstract = {This work proposes a Domain-Specific Language for Parallel Patterns Oriented Parallel Programming (LED-PPOPP). Its main purpose is to provide a way to decrease the amount of effort necessary to develop parallel programs, offering a way to guide developers through patterns which are implemented by the language interface. The idea is to exploit this approach avoiding large performance losses in the applications. Patterns are specialized solutions, previously studied, and used to solve a frequent problem. Thus, parallel patterns offer a higher abstraction level to organize the algorithms in the exploitation of parallelism. They also can be easily learned by inexperienced programmers and software engineers. This work carried out a case study based on the Master/Slave pattern, focusing on the parallelization of algorithms for multi-core architectures. The implementation was validated through experiments to evaluate the programming effort to write code in LED-PPOPP and the performance achieved by the parallel code automatically generated. The obtained results let us conclude that a significant reduction in the parallel programming effort occurred in comparison to the Pthreads library utilization. Additionally, the final performance of the parallelized algorithms confirms that the parallelization with LED-PPOPP does not bring on significant losses related to parallelization using OpenMP in most of the all experiments carried out.}, keywords = {}, pubstate = {published}, tppubtype = {mastersthesis} } This work proposes a Domain-Specific Language for Parallel Patterns Oriented Parallel Programming (LED-PPOPP). Its main purpose is to provide a way to decrease the amount of effort necessary to develop parallel programs, offering a way to guide developers through patterns which are implemented by the language interface. The idea is to exploit this approach avoiding large performance losses in the applications. Patterns are specialized solutions, previously studied, and used to solve a frequent problem. Thus, parallel patterns offer a higher abstraction level to organize the algorithms in the exploitation of parallelism. They also can be easily learned by inexperienced programmers and software engineers. This work carried out a case study based on the Master/Slave pattern, focusing on the parallelization of algorithms for multi-core architectures. The implementation was validated through experiments to evaluate the programming effort to write code in LED-PPOPP and the performance achieved by the parallel code automatically generated. The obtained results let us conclude that a significant reduction in the parallel programming effort occurred in comparison to the Pthreads library utilization. Additionally, the final performance of the parallelized algorithms confirms that the parallelization with LED-PPOPP does not bring on significant losses related to parallelization using OpenMP in most of the all experiments carried out. |
Rui, Fernando Furlan Uma Avaliação Comparativa de Sistemas de Memória Transacional de Software e seus Benchmarks Masters Thesis PUCRS, 2012. @mastersthesis{RUI:DM:12, title = {Uma Avaliação Comparativa de Sistemas de Memória Transacional de Software e seus Benchmarks}, author = {Fernando Furlan Rui}, year = {2012}, date = {2012-01-01}, address = {Porto Alegre, Brazil}, school = {PUCRS}, keywords = {}, pubstate = {published}, tppubtype = {mastersthesis} } |
2011 |
Goerl, Bernardo ; Milani, Cleber Roberto ; Raeder, Mateus ; Kolberg, Mariana ; Fernandes, Luiz Gustavo Bibliotecas e Ferramentas para Computação Numérica de Alto Desempenho Journal Article Anais 11a Escola Regional de Alto Desempenho (ERAD), 1 (1), pp. 225-228, 2011. @article{GOE11ERAD, title = {Bibliotecas e Ferramentas para Computação Numérica de Alto Desempenho}, author = {Goerl, Bernardo and Milani, Cleber Roberto and Raeder, Mateus and Kolberg, Mariana and Fernandes, Luiz Gustavo}, url = {https://gmap.pucrs.br/gmap/files/publications/articles/d77044c5e46d262b5b019279c357b0b8.pdf}, year = {2011}, date = {2011-01-01}, journal = {Anais 11a Escola Regional de Alto Desempenho (ERAD)}, volume = {1}, number = {1}, pages = {225-228}, publisher = {Sociedade Brasileira de Computação (SBC)}, address = {Porto Alegre, Brasil}, keywords = {}, pubstate = {published}, tppubtype = {article} } |
Pires, Victoria Ramos ; Fonseca, Carolina Marques ; Nemetz, Rafael ; Raeder, Mateus ; Fernandes, Luiz Gustavo Escalonamento Dinâmico Nao-Preemptivo para Sistemas Distribuídos de Impressão Journal Article Anais 11a Escola Regional de Alto Desempenho (ERAD), 1 (1), pp. 197-200, 2011. @article{PIR11SBC, title = {Escalonamento Dinâmico Nao-Preemptivo para Sistemas Distribuídos de Impressão}, author = {Pires, Victoria Ramos and Fonseca, Carolina Marques and Nemetz, Rafael and Raeder, Mateus and Fernandes, Luiz Gustavo}, url = {https://gmap.pucrs.br/gmap/files/publications/articles/10cf3a3439a7e65cfa693de7d2fcec5b.pdf}, year = {2011}, date = {2011-01-01}, journal = {Anais 11a Escola Regional de Alto Desempenho (ERAD)}, volume = {1}, number = {1}, pages = {197-200}, publisher = {Sociedade Brasileira de Computação (SBC)}, address = {Porto Alegre, Brasil}, keywords = {}, pubstate = {published}, tppubtype = {article} } |
Castro, Márcio ; Georgiev, Kiril ; Marangozova-Martin, Vania ; Méhaut, Jean-François ; Fernandes, Luiz Gustavo ; Santana, Miguel Analysis and Tracing of Applications Based on Software Transactional Memory on Multicore Architectures Journal Article doi 19th Euromicro International Conference on Parallel, Distributed and Network-Based Computing (PDP), pp. 199–206, 2011. @article{CAS11PDP, title = {Analysis and Tracing of Applications Based on Software Transactional Memory on Multicore Architectures}, author = {Castro, Márcio and Georgiev, Kiril and Marangozova-Martin, Vania and Méhaut, Jean-François and Fernandes, Luiz Gustavo and Santana, Miguel}, doi = {10.1109/PDP.2011.27}, year = {2011}, date = {2011-01-01}, journal = {19th Euromicro International Conference on Parallel, Distributed and Network-Based Computing (PDP)}, pages = {199--206}, publisher = {IEEE Computer Society}, address = {Ayia Napa, Cyprus}, keywords = {}, pubstate = {published}, tppubtype = {article} } |
Raeder, Mateus; Griebler, Dalvan; Baldo, Lucas; Fernandes, Luiz G Performance Prediction of Parallel Applications with Parallel Patterns Using Stochastic Methods Inproceedings doi Sistemas Computacionais (WSCAD-SSC), XII Simpósio em Sistemas Computacionais de Alto Desempenho, pp. 1-13, IEEE, Espírito Santo, Brasil, 2011. @inproceedings{RAEDER:WSCAD:11, title = {Performance Prediction of Parallel Applications with Parallel Patterns Using Stochastic Methods}, author = {Mateus Raeder and Dalvan Griebler and Lucas Baldo and Luiz G. Fernandes}, url = {https://doi.org/10.1109/WSCAD-SSC.2011.18}, doi = {10.1109/WSCAD-SSC.2011.18}, year = {2011}, date = {2011-10-01}, booktitle = {Sistemas Computacionais (WSCAD-SSC), XII Simpósio em Sistemas Computacionais de Alto Desempenho}, pages = {1-13}, publisher = {IEEE}, address = {Espírito Santo, Brasil}, abstract = {One of the main problems in the high performance computing area is the difficulty to define the best strategy to parallelize an application. In this context, the use of analytical methods to evaluate the performance behavior of such applications seems to be an interesting alternative and can help to identify the best implementation strategies. In this work, the Stochastic Automata Network formalism is adopted to model and evaluate the performance of parallel applications, specially developed for clusters of workstations platforms. The methodology used is based on the construction of generic models to describe classical parallel implementation schemes, like Master/Slave, Parallel Phases, Pipeline and Divide and Conquer. Those models are adapted to represent cases of real applications through the definition of input parameters values. Finally, aiming to verify the accuracy of the adopted technique, some comparisons with real applications implementation results are presented.}, keywords = {}, pubstate = {published}, tppubtype = {inproceedings} } One of the main problems in the high performance computing area is the difficulty to define the best strategy to parallelize an application. In this context, the use of analytical methods to evaluate the performance behavior of such applications seems to be an interesting alternative and can help to identify the best implementation strategies. In this work, the Stochastic Automata Network formalism is adopted to model and evaluate the performance of parallel applications, specially developed for clusters of workstations platforms. The methodology used is based on the construction of generic models to describe classical parallel implementation schemes, like Master/Slave, Parallel Phases, Pipeline and Divide and Conquer. Those models are adapted to represent cases of real applications through the definition of input parameters values. Finally, aiming to verify the accuracy of the adopted technique, some comparisons with real applications implementation results are presented. |
Griebler, Dalvan; Raeder, Mateus; Fernandes, Luiz Gustavo Padrões e Frameworks de Programação Paralela em Ambientes Multi-Core Inproceedings Escola Regional de Alto Desempenho (ERAD/RS), pp. 2, Sociedade Brasileira de Computação (SBC), Porto Alegre, RS, BR, 2011. @inproceedings{GRIEBLER:ERAD:11, title = {Padrões e Frameworks de Programação Paralela em Ambientes Multi-Core}, author = {Dalvan Griebler and Mateus Raeder and Luiz Gustavo Fernandes}, url = {https://gmap.pucrs.br/dalvan/papers/2011/CR_ERAD_2011.pdf}, year = {2011}, date = {2011-03-01}, booktitle = {Escola Regional de Alto Desempenho (ERAD/RS)}, pages = {2}, publisher = {Sociedade Brasileira de Computação (SBC)}, address = {Porto Alegre, RS, BR}, abstract = {Nos últimos anos, o mercado recente de estações de trabalho e servidores vem aumentando gradativamente a quantidade de núcleos e processadores, inserindo na sua programação o paralelismo, o que resultou no aumento da complexidade em lidar com este tipo de hardware. Neste cenário, é necessário a disponibilidade de mecanismos que possam fornecer escalabilidade e permitir a exploração de paralelismo nestas arquiteturas, conhecidas como multi-core. Não basta que tais arquiteturas multiprocessadas estejam disponíveis, se estas não são exploradas devidamente. Depuração, condições de corrida, sincronização de threads ou processos e controle de acesso aos dados são exemplos de fatores críticos para a programação destes ambientes paralelos. Novas maneiras de abstrair a complexidade em lidar com estes sistemas estão sendo estudadas, a fim de que a programação paralela seja algo menos complexo para os desenvolvedores de software. Padrões paralelos vêm sendo o alvo de constantes estudos com intuito de padronizar a programação.}, keywords = {}, pubstate = {published}, tppubtype = {inproceedings} } Nos últimos anos, o mercado recente de estações de trabalho e servidores vem aumentando gradativamente a quantidade de núcleos e processadores, inserindo na sua programação o paralelismo, o que resultou no aumento da complexidade em lidar com este tipo de hardware. Neste cenário, é necessário a disponibilidade de mecanismos que possam fornecer escalabilidade e permitir a exploração de paralelismo nestas arquiteturas, conhecidas como multi-core. Não basta que tais arquiteturas multiprocessadas estejam disponíveis, se estas não são exploradas devidamente. Depuração, condições de corrida, sincronização de threads ou processos e controle de acesso aos dados são exemplos de fatores críticos para a programação destes ambientes paralelos. Novas maneiras de abstrair a complexidade em lidar com estes sistemas estão sendo estudadas, a fim de que a programação paralela seja algo menos complexo para os desenvolvedores de software. Padrões paralelos vêm sendo o alvo de constantes estudos com intuito de padronizar a programação. |
Fernandes, Luiz Gustavo ; Nunes, Thiago ; Kolberg, Mariana ; Giannetti, Fabio ; Nemetz, Rafael ; Cabeda, Alexis Job Profiling and Queue Management in High Performance Printing Inproceedings doi Computer Science - Research and Development(CSRD), pp. 1-20, Springer Berlin Heidelberg, Secaucus, NJ, USA, 2011. @inproceedings{FER11CSRD, title = {Job Profiling and Queue Management in High Performance Printing}, author = {Fernandes, Luiz Gustavo and Nunes, Thiago and Kolberg, Mariana and Giannetti, Fabio and Nemetz, Rafael and Cabeda, Alexis}, doi = {10.1007/s00450-010-0134-0}, year = {2011}, date = {2011-05-01}, booktitle = {Computer Science - Research and Development(CSRD)}, pages = {1-20}, publisher = {Springer Berlin Heidelberg}, address = {Secaucus, NJ, USA}, keywords = {}, pubstate = {published}, tppubtype = {inproceedings} } |
Raeder, Mateus ; Griebler, Dalvan ; Ribeiro, Neumar ; Fernandes, Luiz Gustavo ; Castro, Márcio A Hybrid Parallel Version of ICTM for Cluster of NUMA Machines Inproceedings IADIS International Conference on Applied Computing (AC), pp. 291-298, IADIS Press, Rio de Janeiro, Brazil, 2011. @inproceedings{RAE11IADISAC, title = {A Hybrid Parallel Version of ICTM for Cluster of NUMA Machines}, author = {Raeder, Mateus and Griebler, Dalvan and Ribeiro, Neumar and Fernandes, Luiz Gustavo and Castro, Márcio}, url = {https://gmap.pucrs.br/gmap/files/publications/articles/10e0005e546d980503ab1cfecdd8a559.pdf}, year = {2011}, date = {2011-11-01}, booktitle = {IADIS International Conference on Applied Computing (AC)}, pages = {291-298}, publisher = {IADIS Press}, address = {Rio de Janeiro, Brazil}, keywords = {}, pubstate = {published}, tppubtype = {inproceedings} } |
Rui, Fernando Furlan ; Fernandes, Luiz Gustavo ; Raeder, Mateus Avaliação de Sistemas de Memórias Transacionais de Software Inproceedings 11a Escola Regional de Alto Desempenho (ERAD), pp. 95-96, Sociedade Brasileira de Computação, Porto Alegre, Brazil, 2011. @inproceedings{RUI11ERAD, title = {Avaliação de Sistemas de Memórias Transacionais de Software}, author = {Rui, Fernando Furlan and Fernandes, Luiz Gustavo and Raeder, Mateus}, url = {https://gmap.pucrs.br/gmap/files/publications/articles/ee0bede1bc0f23529feabebe9203ee16.pdf}, year = {2011}, date = {2011-03-01}, booktitle = {11a Escola Regional de Alto Desempenho (ERAD)}, pages = {95-96}, publisher = {Sociedade Brasileira de Computação}, address = {Porto Alegre, Brazil}, keywords = {}, pubstate = {published}, tppubtype = {inproceedings} } |
Fonseca, Carolina Marques Otimizando o Escalonamento de Jobs no Processo de Rasterização de Documentos Personalizáveis Masters Thesis PUCRS, 2011. @mastersthesis{FONSECA:DM:11, title = {Otimizando o Escalonamento de Jobs no Processo de Rasterização de Documentos Personalizáveis}, author = {Carolina Marques Fonseca}, url = {https://gmap.pucrs.br/gmap/files/publications/articles/c816a09f2ab077983a9ff40856a33a23.pdf}, year = {2011}, date = {2011-01-01}, address = {Porto Alegre, Brazil}, school = {PUCRS}, keywords = {}, pubstate = {published}, tppubtype = {mastersthesis} } |
Ribeiro, Neumar Silva Explorando Programação Híbrida no Contexto de Clusters de Máquinas NUMA Masters Thesis PUCRS, 2011. @mastersthesis{RIBEIRO:DM:11, title = {Explorando Programação Híbrida no Contexto de Clusters de Máquinas NUMA}, author = {Neumar Silva Ribeiro}, url = {https://gmap.pucrs.br/gmap/files/publications/articles/55861ee97a2e33bdceeff48db81e493d.pdf}, year = {2011}, date = {2011-01-01}, address = {Porto Alegre, Brazil}, school = {PUCRS}, keywords = {}, pubstate = {published}, tppubtype = {mastersthesis} } |
Nemetz, Rafael PUCRS, 2011. @mastersthesis{NEMETZ:DM:11, title = {Otimizando o Fluxo de Tarefas em Sistemas Distribuídos de Impressão: Um Algoritmo de Escalonamento Dinâmico Não Preemptivo Baseado em Mecanismo de Previsão}, author = {Rafael Nemetz}, url = {https://gmap.pucrs.br/gmap/files/publications/articles/3a25211cd9fe741f2f5a3f12f86fe557.pdf}, year = {2011}, date = {2011-01-01}, address = {Porto Alegre, Brazil}, school = {PUCRS}, keywords = {}, pubstate = {published}, tppubtype = {mastersthesis} } |
Griebler, Dalvan; Fernandes, Luiz G Padrões e Frameworks de Programação Paralela em Arquiteturas Multi-Core Technical Report Faculdade de Informática - PPGCC - PUCRS Porto Alegre, Brazil, 2011. @techreport{GRIEBLER:TR:11, title = {Padrões e Frameworks de Programação Paralela em Arquiteturas Multi-Core}, author = {Dalvan Griebler and Luiz G. Fernandes}, url = {http://www3.pucrs.br/pucrs/files/uni/poa/facin/pos/relatoriostec/064.pdf}, year = {2011}, date = {2011-01-01}, address = {Porto Alegre, Brazil}, institution = {Faculdade de Informática - PPGCC - PUCRS}, abstract = {A computação paralela vem crescendo rapidamente em termos de desempenho, um dos adventos é o modelo arquitetural multi-core. Entretanto, não bastam estar disponíveis tais arquiteturas multiprocessadas, se estas não são exploradas devidamente. A maior parte dos programadores de código sequencial se negam a dedicar seus esforços para trabalhar com este paradigma, pela complexidade apresentada no tratamento de problemas. Depuração, condições de corrida, sincronização de threads ou processos e controle de acesso aos dados são exemplos de fatores críticos para estes ambientes paralelos. Novas maneiras de abstrair a complexidade em lidar com estes sistemas estão sendo estudadas, a fim de que a programação paralela seja algo comum para os desenvolvedores de software. Neste sentido, o objetivo deste trabalho é estudar e fazer um levantamento teórico sobre os mecanismos utilizados para melhorar a programação paralela em ambientes multi-core. Padrões paralelos vêm sendo o alvo de constantes estudos com intuito de padronizar a programação paralela. A padronização foi um dos primeiros passos em direção a melhores implementações para o espaço de projeto de algoritmos paralelos. No entanto, uma implementação eficiente com estes padrões nem sempre é possível. Depende do programador se a modelagem e os cuidados com relação ao acesso de dados foram corretamente tratados. Padrões paralelos determinísticos tornaram-se o mais atual objeto de pesquisa no cenário de programação paralela (multi-core). O propósito deles é possíbilitar o desenvolvimento de programas eficientes mantendo uma única ordem na execução, similar ao que se tem nos algoritmos sequenciais. Além disso, fornecem determinismo na execução dos programas eliminando a necessidade de condições de corrida. O desenvolvimento de frameworks passou a ser uma solução para ajudar os programadores nesta tarefa, abstraindo parte da complexidade em lidar com os problemas frequentes, visando rapidez e facilidade na aprendizagem e desenvolvimento de programas paralelos.}, keywords = {}, pubstate = {published}, tppubtype = {techreport} } A computação paralela vem crescendo rapidamente em termos de desempenho, um dos adventos é o modelo arquitetural multi-core. Entretanto, não bastam estar disponíveis tais arquiteturas multiprocessadas, se estas não são exploradas devidamente. A maior parte dos programadores de código sequencial se negam a dedicar seus esforços para trabalhar com este paradigma, pela complexidade apresentada no tratamento de problemas. Depuração, condições de corrida, sincronização de threads ou processos e controle de acesso aos dados são exemplos de fatores críticos para estes ambientes paralelos. Novas maneiras de abstrair a complexidade em lidar com estes sistemas estão sendo estudadas, a fim de que a programação paralela seja algo comum para os desenvolvedores de software. Neste sentido, o objetivo deste trabalho é estudar e fazer um levantamento teórico sobre os mecanismos utilizados para melhorar a programação paralela em ambientes multi-core. Padrões paralelos vêm sendo o alvo de constantes estudos com intuito de padronizar a programação paralela. A padronização foi um dos primeiros passos em direção a melhores implementações para o espaço de projeto de algoritmos paralelos. No entanto, uma implementação eficiente com estes padrões nem sempre é possível. Depende do programador se a modelagem e os cuidados com relação ao acesso de dados foram corretamente tratados. Padrões paralelos determinísticos tornaram-se o mais atual objeto de pesquisa no cenário de programação paralela (multi-core). O propósito deles é possíbilitar o desenvolvimento de programas eficientes mantendo uma única ordem na execução, similar ao que se tem nos algoritmos sequenciais. Além disso, fornecem determinismo na execução dos programas eliminando a necessidade de condições de corrida. O desenvolvimento de frameworks passou a ser uma solução para ajudar os programadores nesta tarefa, abstraindo parte da complexidade em lidar com os problemas frequentes, visando rapidez e facilidade na aprendizagem e desenvolvimento de programas paralelos. |
2010 |
Castro, M; Georgiev, K; Marangonzova-Martin, V; Méhaut, J F; Fernandes, L G; Santana, M Analyzing Software Transactional Memory Applications by Tracing Transactions Journal Article Grenoble: INRIA, 1 (1), pp. 1-24, 2010. @article{CAS10INRIA, title = {Analyzing Software Transactional Memory Applications by Tracing Transactions}, author = {Castro, M. and Georgiev, K. and Marangonzova-Martin, V. and Méhaut, J. F. and Fernandes, L. G. and Santana, M.}, url = {https://gmap.pucrs.br/gmap/files/publications/articles/8441b5ba8774cff742063a0ba66715a5.pdf}, year = {2010}, date = {2010-01-01}, journal = {Grenoble: INRIA}, volume = {1}, number = {1}, pages = {1-24}, publisher = {INRIA}, address = {Grenoble, Portugal}, keywords = {}, pubstate = {published}, tppubtype = {article} } |
Kolberg, Mariana ; Fernandes, Luiz Gustavo ; Milani, Cleber Roberto Intervals on Self-verified Linear Systems Solver for Multicore Computers Journal Article Interval Mathematics and Connections in Teaching and Scientific Developmen (IntMath-TSD), 1 (1), pp. 35-42, 2010. @article{FER10IntMathTSD, title = {Intervals on Self-verified Linear Systems Solver for Multicore Computers}, author = {Kolberg, Mariana and Fernandes, Luiz Gustavo and Milani, Cleber Roberto}, url = {https://gmap.pucrs.br/gmap/files/publications/articles/d2a19a6490a0f8a243ddb15782f1a3b3.pdf}, year = {2010}, date = {2010-01-01}, journal = {Interval Mathematics and Connections in Teaching and Scientific Developmen (IntMath-TSD)}, volume = {1}, number = {1}, pages = {35-42}, address = {Universidade Federal de Pelotas, Ed. Universitária}, keywords = {}, pubstate = {published}, tppubtype = {article} } |
2017 |
Towards Distributed Parallel Programming Support for the SPar DSL Inproceedings doi Parallel Computing is Everywhere, Proceedings of the International Conference on Parallel Computing, pp. 563-572, IOS Press, Bologna, Italy, 2017. |
Exploração do Paralelismo em Algoritmos de Mineração de Dados com Pthreads, OpenMP, FastFlow, TBB e Phoenix++ Inproceedings Escola Regional de Alto Desempenho (ERAD/RS), pp. 4, Sociedade Brasileira de Computação (SBC), Ijuí, RS, BR, 2017. |
Proposta de uma Plataforma para Experimentos de Software em Programação Paralela Inproceedings Escola Regional de Alto Desempenho (ERAD/RS), pp. 4, Sociedade Brasileira de Computação (SBC), Ijuí, RS, BR, 2017. |
Proposta de Implementação de Grau de Paralelismo Adaptativo em uma DSL para Paralelismo de Stream Inproceedings Escola Regional de Alto Desempenho (ERAD/RS), pp. 4, Sociedade Brasileira de Computação (SBC), Ijuí, RS, BR, 2017. |
Explorando a Flexibilidade e o Desempenho da Biblioteca FastFlow com o Padrão Paralelo Farm Inproceedings Escola Regional de Alto Desempenho (ERAD/RS), pp. 4, Sociedade Brasileira de Computação (SBC), Ijuí, RS, BR, 2017. |
Avaliando a Produtividade e o Desempenho da DSL SPar em uma Aplicação de Detecção de Pistas Inproceedings Escola Regional de Alto Desempenho (ERAD/RS), pp. 4, Sociedade Brasileira de Computação (SBC), Ijuí, RS, BR, 2017. |
An Intra-Cloud Networking Performance Evaluation on CloudStack Environment Inproceedings doi 25th Euromicro International Conference on Parallel, Distributed and Network-Based Processing (PDP), pp. 5, IEEE, St. Petersburg, Russia, 2017. |
Improving the Network Performance of a Container-Based Cloud Environment for Hadoop Systems Inproceedings doi International Conference on High Performance Computing & Simulation (HPCS), pp. 619-626, IEEE, Genoa, Italy, 2017. |
2016 |
A comparative study of energy-aware scheduling algorithms for computational grids Journal Article doi Journal of Systems and Software, 117 , pp. 153-165, 2016. |
Private IaaS Clouds: A Comparative Analysis of OpenNebula, CloudStack and OpenStack Inproceedings doi 24th Euromicro International Conference on Parallel, Distributed and Network-Based Processing (PDP), pp. 672-679, IEEE, Heraklion Crete, Greece, 2016. |
Proposta de Suporte a Elasticidade Automática em Nuvem para uma Linguagem Específica de Domínio Inproceedings Escola Regional de Alto Desempenho (ERAD/RS), pp. 197-198, Sociedade Brasileira de Computação (SBC), São Leopoldo, RS, BR, 2016. |
Em Direção à um Benchmark de Workload Sintético para Paralelismo de Stream em Arquiteturas Multicore Inproceedings Escola Regional de Alto Desempenho (ERAD/RS), pp. 171-172, Sociedade Brasileira de Computação (SBC), São Leopoldo, RS, BR, 2016. |
GMaVis: A Domain-Specific Language for Large-Scale Geospatial Data Visualization Supporting Multi-core Parallelism Masters Thesis Faculdade de Informática - PPGCC - PUCRS, 2016. |
Domain-Specific Language & Support Tool for High-Level Stream Parallelism PhD Thesis Faculdade de Informática - PPGCC - PUCRS, 2016. |
Domain-Specific Language & Support Tool for High-Level Stream Parallelism PhD Thesis Computer Science Department - University of Pisa, 2016. |
2015 |
Coding Productivity in MapReduce Applications for Distributed and Shared Memory Architectures Journal Article doi International Journal of Software Engineering and Knowledge Engineering, 25 (10), pp. 1739-1741, 2015. |
A job profile oriented scheduling architecture for improving the throughput of industrial printing environments Journal Article doi Computers & Industrial Engineering, 88 , pp. 191-205, 2015. |
A Unified MapReduce Domain-Specific Language for Distributed and Shared Memory Architectures Inproceedings doi The 27th International Conference on Software Engineering & Knowledge Engineering, pp. 6, Knowledge Systems Institute Graduate School, Pittsburgh, USA, 2015. |
An Embedded C++ Domain-Specific Language for Stream Parallelism Inproceedings doi Parallel Computing: On the Road to Exascale, Proceedings of the International Conference on Parallel Computing, pp. 317-326, IOS Press, Edinburgh, Scotland, UK, 2015. |
Towards a Domain-Specific Language for Geospatial Data Visualization Maps with Big Data Sets Inproceedings doi ACS/IEEE International Conference on Computer Systems and Applications, pp. 8, IEEE, Marrakech, Marrocos, 2015. |
Uma Linguagem Específica de Domínio com Geração de Código Paralelo para Visualização de Grandes Volumes de Dados Inproceedings Escola Regional de Alto Desempenho (ERAD/RS), pp. 139-140, Sociedade Brasileira de Computação (SBC), Gramado, RS, BR, 2015. |
A Unified MapReduce Programming Interface for Multi-Core and Distributed Architectures Masters Thesis Faculdade de Informática - PPGCC - PUCRS, 2015. |
2014 |
Performance and Usability Evaluation of a Pattern-Oriented Parallel Programming Interface for Multi-Core Architectures Inproceedings The 26th International Conference on Software Engineering & Knowledge Engineering, pp. 25-30, Knowledge Systems Institute Graduate School, Vancouver, Canada, 2014. |
JAR tool: using document analysis for improving the throughput of high performance printing environments Inproceedings doi ACM symposium on Document engineering, pp. 175-178, ACM, New York, NY, USA, 2014. |
Efeitos do Balanceamento de Carga no Consumo de Energia de Clusters de Computadores Heterogêneos Inproceedings XIV Escola Regional de Alto Desempenho da Região Sul (ERAD-RS), pp. 99-100, Sociedade Brasileira de Computação (SBC), Alegrete, BR, 2014. |
Evaluating the Impact of Transactional Characteristics on the Performance of Transactional Memory Applications Inproceedings doi 22nd Euromicro International Conference on Parallel, Distributed, and Network-Based Processing, pp. 93-97, IEEE, Torino, Italy, 2014. |
2013 |
A Parallel Approach to Fine-tune Field Emission Displays Using a Genetic Algorithm Journal Article Latin American Conference on High Performance Computing (CLCAR), 2013. |
Towards a Domain-Specific Language for Patterns-Oriented Parallel Programming Inproceedings doi Programming Languages - 17th Brazilian Symposium - SBLP, pp. 105-119, Springer Berlin Heidelberg, Brasilia, Brazil, 2013. |
DSL-POPP: Linguagem Específica de Domínio para Programação Paralela Orientada a Padrões Inproceedings Escola Regional de Alto Desempenho (ERAD/RS), pp. 2, Sociedade Brasileira de Computação (SBC), Porto Alegre, RS, BR, 2013. |
Energy Efficiency Management in Computational Grids Through Energy-aware Scheduling Inproceedings doi Proceedings of the 28th Annual ACM Symposium on Applied Computing, pp. 1163–1168, ACM, Coimbra, Portugal, 2013, ISBN: 978-1-4503-1656-9. |
13a Escola Regional de Alto Desempenho (ERAD), pp. 107-108, Sociedade Brasileira de Computação, Porto Alegre, Brazil, 2013. |
Algoritmos de Escalonamento para Grades Computacionais voltados à Eficiência Energética Masters Thesis PUCRS, 2013. |
Resolução Paralela Verificada de Sistemas de Equações Lineares: Uma Abordagem para Eficiência Energética Utilizando DVFS Masters Thesis PUCRS, 2013. |
2012 |
Dynamic Thread Mapping Based on Machine Learning for Transactional Memory Applications Inproceedings doi 18th International Conference, Euro-Par, pp. 465-476, Springer Berlin Heidelberg, Rhodes Island, Greece, 2012. |
Faculdade de Informática - PPGCC - PUCRS, 2012. |
Uma Avaliação Comparativa de Sistemas de Memória Transacional de Software e seus Benchmarks Masters Thesis PUCRS, 2012. |
2011 |
Bibliotecas e Ferramentas para Computação Numérica de Alto Desempenho Journal Article Anais 11a Escola Regional de Alto Desempenho (ERAD), 1 (1), pp. 225-228, 2011. |
Escalonamento Dinâmico Nao-Preemptivo para Sistemas Distribuídos de Impressão Journal Article Anais 11a Escola Regional de Alto Desempenho (ERAD), 1 (1), pp. 197-200, 2011. |
Analysis and Tracing of Applications Based on Software Transactional Memory on Multicore Architectures Journal Article doi 19th Euromicro International Conference on Parallel, Distributed and Network-Based Computing (PDP), pp. 199–206, 2011. |
Performance Prediction of Parallel Applications with Parallel Patterns Using Stochastic Methods Inproceedings doi Sistemas Computacionais (WSCAD-SSC), XII Simpósio em Sistemas Computacionais de Alto Desempenho, pp. 1-13, IEEE, Espírito Santo, Brasil, 2011. |
Padrões e Frameworks de Programação Paralela em Ambientes Multi-Core Inproceedings Escola Regional de Alto Desempenho (ERAD/RS), pp. 2, Sociedade Brasileira de Computação (SBC), Porto Alegre, RS, BR, 2011. |
Job Profiling and Queue Management in High Performance Printing Inproceedings doi Computer Science - Research and Development(CSRD), pp. 1-20, Springer Berlin Heidelberg, Secaucus, NJ, USA, 2011. |
A Hybrid Parallel Version of ICTM for Cluster of NUMA Machines Inproceedings IADIS International Conference on Applied Computing (AC), pp. 291-298, IADIS Press, Rio de Janeiro, Brazil, 2011. |
Avaliação de Sistemas de Memórias Transacionais de Software Inproceedings 11a Escola Regional de Alto Desempenho (ERAD), pp. 95-96, Sociedade Brasileira de Computação, Porto Alegre, Brazil, 2011. |
Otimizando o Escalonamento de Jobs no Processo de Rasterização de Documentos Personalizáveis Masters Thesis PUCRS, 2011. |
Explorando Programação Híbrida no Contexto de Clusters de Máquinas NUMA Masters Thesis PUCRS, 2011. |
PUCRS, 2011. |
Padrões e Frameworks de Programação Paralela em Arquiteturas Multi-Core Technical Report Faculdade de Informática - PPGCC - PUCRS Porto Alegre, Brazil, 2011. |
2010 |
Analyzing Software Transactional Memory Applications by Tracing Transactions Journal Article Grenoble: INRIA, 1 (1), pp. 1-24, 2010. |
Intervals on Self-verified Linear Systems Solver for Multicore Computers Journal Article Interval Mathematics and Connections in Teaching and Scientific Developmen (IntMath-TSD), 1 (1), pp. 35-42, 2010. |