2015
|
Ledur, Cleverson; Griebler, Dalvan; Manssour, Isabel; Fernandes, Luiz G Towards a Domain-Specific Language for Geospatial Data Visualization Maps with Big Data Sets Inproceedings doi ACS/IEEE International Conference on Computer Systems and Applications, pp. 8, IEEE, Marrakech, Marrocos, 2015. Resumo | Links | BibTeX @inproceedings{LEDUR:AICCSA:15,
title = {Towards a Domain-Specific Language for Geospatial Data Visualization Maps with Big Data Sets},
author = {Cleverson Ledur and Dalvan Griebler and Isabel Manssour and Luiz G. Fernandes},
url = {http://dx.doi.org/10.1109/AICCSA.2015.7507178},
doi = {10.1109/AICCSA.2015.7507178},
year = {2015},
date = {2015-11-01},
booktitle = {ACS/IEEE International Conference on Computer Systems and Applications},
pages = {8},
publisher = {IEEE},
address = {Marrakech, Marrocos},
series = {AICCSA'15},
abstract = {Data visualization is an alternative for representing information and helping people gain faster insights. However, the programming/creating of a visualization for large data sets is still a challenging task for users with low-level of software development knowledge. Our goal is to increase the productivity of experts who are familiar with the application domain. Therefore, we proposed an external Domain-Specific Language (DSL) that allows massive input of raw data and provides a small dictionary with suitable data visualization keywords. Also, we implemented it to support efficient data filtering operations and generate HTML or Javascript output code files (using Google Maps API). To measure the potential of our DSL, we evaluated four types of geospatial data visualization maps with four different technologies. The experiment results demonstrated a productivity gain when compared to the traditional way of implementing (e.g., Google Maps API, OpenLayers, and Leaflet), and efficient algorithm implementation.},
keywords = {},
pubstate = {published},
tppubtype = {inproceedings}
}
Data visualization is an alternative for representing information and helping people gain faster insights. However, the programming/creating of a visualization for large data sets is still a challenging task for users with low-level of software development knowledge. Our goal is to increase the productivity of experts who are familiar with the application domain. Therefore, we proposed an external Domain-Specific Language (DSL) that allows massive input of raw data and provides a small dictionary with suitable data visualization keywords. Also, we implemented it to support efficient data filtering operations and generate HTML or Javascript output code files (using Google Maps API). To measure the potential of our DSL, we evaluated four types of geospatial data visualization maps with four different technologies. The experiment results demonstrated a productivity gain when compared to the traditional way of implementing (e.g., Google Maps API, OpenLayers, and Leaflet), and efficient algorithm implementation. |
Ledur, Cleverson; Griebler, Dalvan; Fernandes, Luiz Gustavo; Manssour, Isabel Uma Linguagem Específica de Domínio com Geração de Código Paralelo para Visualização de Grandes Volumes de Dados Inproceedings Escola Regional de Alto Desempenho (ERAD/RS), pp. 139-140, Sociedade Brasileira de Computação (SBC), Gramado, RS, BR, 2015. Resumo | Links | BibTeX @inproceedings{LEDUR:ERAD:15,
title = {Uma Linguagem Específica de Domínio com Geração de Código Paralelo para Visualização de Grandes Volumes de Dados},
author = {Cleverson Ledur and Dalvan Griebler and Luiz Gustavo Fernandes and Isabel Manssour},
url = {https://gmap.pucrs.br/dalvan/papers/2015/CR_ERAD_PG_2015.pdf},
year = {2015},
date = {2015-04-01},
booktitle = {Escola Regional de Alto Desempenho (ERAD/RS)},
pages = {139-140},
publisher = {Sociedade Brasileira de Computação (SBC)},
address = {Gramado, RS, BR},
abstract = {Este artigo apresenta uma análise sobre linguagens específicas de domínio para a criação de visualizações. Ao final, propõe uma nova linguagem específica de domínio para geração de visualizações de quantidades massivas de dados, paralelizando não só a geração e a interação da visualização, mas também o pré-processamento dos dados brutos.},
keywords = {},
pubstate = {published},
tppubtype = {inproceedings}
}
Este artigo apresenta uma análise sobre linguagens específicas de domínio para a criação de visualizações. Ao final, propõe uma nova linguagem específica de domínio para geração de visualizações de quantidades massivas de dados, paralelizando não só a geração e a interação da visualização, mas também o pré-processamento dos dados brutos. |
Adornes, Daniel A Unified MapReduce Programming Interface for Multi-Core and Distributed Architectures Masters Thesis Faculdade de Informática - PPGCC - PUCRS, 2015. Resumo | Links | BibTeX @mastersthesis{ADORNES:DM:15,
title = {A Unified MapReduce Programming Interface for Multi-Core and Distributed Architectures},
author = {Daniel Adornes},
url = {http://tede2.pucrs.br/tede2/handle/tede/6782},
year = {2015},
date = {2015-03-01},
address = {Porto Alegre, Brazil},
school = {Faculdade de Informática - PPGCC - PUCRS},
abstract = {In order to improve performance, simplicity and scalability of large datasets processing, Google proposed the MapReduce parallel pattern. This pattern has been implemented in several ways for different architectural levels, achieving significant results for high performance computing.However, developing optimized code with those solutions requires specialized knowledge in each framework's interface and programming language. Recently, the DSL-POPP was proposed as a framework with a high-level language for patterns-oriented parallel programming, aimed at abstracting complexities of parallel and distributed code. Inspired on DSL-POPP, this work proposes the implementation of a unified MapReduce programming interface with rules for code transformation to optimized solutions for shared-memory multi-core and distributed architectures. The evaluation demonstrates that the proposed interface is able to avoid performance losses, while also achieving a code and a development cost reduction from 41.84% to 96.48%. Moreover, the construction of the code generator, the compatibility with other MapReduce solutions and the extension of DSL-POPP with the MapReduce pattern are proposed as future work.},
keywords = {},
pubstate = {published},
tppubtype = {mastersthesis}
}
In order to improve performance, simplicity and scalability of large datasets processing, Google proposed the MapReduce parallel pattern. This pattern has been implemented in several ways for different architectural levels, achieving significant results for high performance computing.However, developing optimized code with those solutions requires specialized knowledge in each framework's interface and programming language. Recently, the DSL-POPP was proposed as a framework with a high-level language for patterns-oriented parallel programming, aimed at abstracting complexities of parallel and distributed code. Inspired on DSL-POPP, this work proposes the implementation of a unified MapReduce programming interface with rules for code transformation to optimized solutions for shared-memory multi-core and distributed architectures. The evaluation demonstrates that the proposed interface is able to avoid performance losses, while also achieving a code and a development cost reduction from 41.84% to 96.48%. Moreover, the construction of the code generator, the compatibility with other MapReduce solutions and the extension of DSL-POPP with the MapReduce pattern are proposed as future work. |
2014
|
Griebler, Dalvan; Adornes, Daniel; Fernandes, Luiz G Performance and Usability Evaluation of a Pattern-Oriented Parallel Programming Interface for Multi-Core Architectures Inproceedings The 26th International Conference on Software Engineering & Knowledge Engineering, pp. 25-30, Knowledge Systems Institute Graduate School, Vancouver, Canada, 2014. Resumo | Links | BibTeX @inproceedings{GRIEBLER:SEKE:14,
title = {Performance and Usability Evaluation of a Pattern-Oriented Parallel Programming Interface for Multi-Core Architectures},
author = {Dalvan Griebler and Daniel Adornes and Luiz G. Fernandes},
url = {https://gmap.pucrs.br/dalvan/papers/2014/CR_SEKE_2014.pdf},
year = {2014},
date = {2014-07-01},
booktitle = {The 26th International Conference on Software Engineering & Knowledge Engineering},
pages = {25-30},
publisher = {Knowledge Systems Institute Graduate School},
address = {Vancouver, Canada},
abstract = {Multi-core architectures have increased the power of parallelism by coupling many cores in a single chip. This becomes even more complex for developers to exploit the avail-able parallelism in order to provide high performance scalable programs. To address these challenges, we propose the DSL-POPP (Domain-Specific Language for Pattern-Oriented Parallel Programming), which links the pattern-based approach in the programming interface as an alternative to reduce the effort of parallel software development, and achieve good performance in some applications. In this paper, the objective is to evaluate the usability and performance of the master/slave pattern and compare it to the Pthreads library. Moreover, experiments have shown that the master/slave interface of the DSL-POPP reduces up to 50% of the programming effort, without significantly affecting the performance.},
keywords = {},
pubstate = {published},
tppubtype = {inproceedings}
}
Multi-core architectures have increased the power of parallelism by coupling many cores in a single chip. This becomes even more complex for developers to exploit the avail-able parallelism in order to provide high performance scalable programs. To address these challenges, we propose the DSL-POPP (Domain-Specific Language for Pattern-Oriented Parallel Programming), which links the pattern-based approach in the programming interface as an alternative to reduce the effort of parallel software development, and achieve good performance in some applications. In this paper, the objective is to evaluate the usability and performance of the master/slave pattern and compare it to the Pthreads library. Moreover, experiments have shown that the master/slave interface of the DSL-POPP reduces up to 50% of the programming effort, without significantly affecting the performance. |
Kolberg, Mariana; Fernandes, Luiz Gustavo; Raeder, Mateus; Fonseca, Carolina JAR tool: using document analysis for improving the throughput of high performance printing environments Inproceedings doi ACM symposium on Document engineering, pp. 175-178, ACM, New York, NY, USA, 2014. Resumo | Links | BibTeX @inproceedings{gmap:KOLBERG:DocEng:14,
title = {JAR tool: using document analysis for improving the throughput of high performance printing environments},
author = {Mariana Kolberg and Luiz Gustavo Fernandes and Mateus Raeder and Carolina Fonseca},
url = {https://doi.org/10.1145/2644866.2644887},
doi = {10.1145/2644866.2644887},
year = {2014},
date = {2014-09-01},
booktitle = {ACM symposium on Document engineering},
pages = {175-178},
publisher = {ACM},
address = {New York, NY, USA},
series = {DocEng'14},
abstract = {Digital printers have consistently improved their speed in the past years. Meanwhile, the need for document personalization and customization has increased. As a consequence of these two facts, the traditional rasterization process has become a highly demanding computational step in the printing workflow. Moreover, Print Service Providers are now using multiple RIP engines to speed up the whole document rasterization process, and depending on the input document characteristics the rasterization process may not achieve the print-engine speed creating a unwanted bottleneck. In this scenario, we developed a tool called Job Adaptive Router (JAR) aiming at improving the throughput of the rasterization process through a clever load balance among RIP engines which is based on information obtained by the analysis of input documents content. Furthermore, along with this tool we propose some strategies that consider relevant characteristics of documents, such as transparency and reusability of images, to split the job in a more intelligent way. The obtained results confirm that the use of the proposed tool improved the rasterization process performance.},
keywords = {},
pubstate = {published},
tppubtype = {inproceedings}
}
Digital printers have consistently improved their speed in the past years. Meanwhile, the need for document personalization and customization has increased. As a consequence of these two facts, the traditional rasterization process has become a highly demanding computational step in the printing workflow. Moreover, Print Service Providers are now using multiple RIP engines to speed up the whole document rasterization process, and depending on the input document characteristics the rasterization process may not achieve the print-engine speed creating a unwanted bottleneck. In this scenario, we developed a tool called Job Adaptive Router (JAR) aiming at improving the throughput of the rasterization process through a clever load balance among RIP engines which is based on information obtained by the analysis of input documents content. Furthermore, along with this tool we propose some strategies that consider relevant characteristics of documents, such as transparency and reusability of images, to split the job in a more intelligent way. The obtained results confirm that the use of the proposed tool improved the rasterization process performance. |
do Carmo, Andriele Busatto; Fernandes, Luiz Gustavo Efeitos do Balanceamento de Carga no Consumo de Energia de Clusters de Computadores Heterogêneos Inproceedings XIV Escola Regional de Alto Desempenho da Região Sul (ERAD-RS), pp. 99-100, Sociedade Brasileira de Computação (SBC), Alegrete, BR, 2014. Links | BibTeX @inproceedings{gmap:CARMO:ERAD:14,
title = {Efeitos do Balanceamento de Carga no Consumo de Energia de Clusters de Computadores Heterogêneos},
author = {Andriele Busatto do Carmo and Luiz Gustavo Fernandes},
url = {https://gmap.pucrs.br/gmap/files/publications/articles/f1bb4afe2b05a4cb9694e72b1dfc952a.pdf},
year = {2014},
date = {2014-03-01},
booktitle = {XIV Escola Regional de Alto Desempenho da Região Sul (ERAD-RS)},
pages = {99-100},
publisher = {Sociedade Brasileira de Computação (SBC)},
address = {Alegrete, BR},
keywords = {},
pubstate = {published},
tppubtype = {inproceedings}
}
|
Rui, Fernando; Castro, Márcio; Griebler, Dalvan; Fernandes, Luiz Gustavo Evaluating the Impact of Transactional Characteristics on the Performance of Transactional Memory Applications Inproceedings doi 22nd Euromicro International Conference on Parallel, Distributed, and Network-Based Processing, pp. 93-97, IEEE, Torino, Italy, 2014. Resumo | Links | BibTeX @inproceedings{gmap:RUI:PDP:14,
title = {Evaluating the Impact of Transactional Characteristics on the Performance of Transactional Memory Applications},
author = {Fernando Rui and Márcio Castro and Dalvan Griebler and Luiz Gustavo Fernandes},
url = {https://doi.org/10.1109/PDP.2014.57},
doi = {10.1109/PDP.2014.57},
year = {2014},
date = {2014-02-01},
booktitle = {22nd Euromicro International Conference on Parallel, Distributed, and Network-Based Processing},
pages = {93-97},
publisher = {IEEE},
address = {Torino, Italy},
series = {PDP'14},
abstract = {Transactional Memory (TM) is reputed by many researchers to be a promising solution to ease parallel programming on multicore processors. This model provides the scalability of fine-grained locking while avoiding common issues of traditional mechanisms, such as deadlocks. During these almost twenty years of research, several TM systems and benchmarks have been proposed. However, TM is not yet widely adopted by the scientific community to develop parallel applications due to unanswered questions in the literature, such as "how to identify if a parallel application can exploit TM to achieve better performance?" or "what are the reasons of poor performances of some TM applications?". In this work, we contribute to answer those questions through a comparative evaluation of a set of TM applications on four different state- of-the-art TM systems. Moreover, we identify some of the most important TM characteristics that impact directly the performance of TM applications. Our results can be useful to identify opportunities for optimizations.},
keywords = {},
pubstate = {published},
tppubtype = {inproceedings}
}
Transactional Memory (TM) is reputed by many researchers to be a promising solution to ease parallel programming on multicore processors. This model provides the scalability of fine-grained locking while avoiding common issues of traditional mechanisms, such as deadlocks. During these almost twenty years of research, several TM systems and benchmarks have been proposed. However, TM is not yet widely adopted by the scientific community to develop parallel applications due to unanswered questions in the literature, such as "how to identify if a parallel application can exploit TM to achieve better performance?" or "what are the reasons of poor performances of some TM applications?". In this work, we contribute to answer those questions through a comparative evaluation of a set of TM applications on four different state- of-the-art TM systems. Moreover, we identify some of the most important TM characteristics that impact directly the performance of TM applications. Our results can be useful to identify opportunities for optimizations. |
2013
|
Castro, Márcio; Velho, Pedro; Fernandes, Luiz Gustavo; Méhaut, Jean-François A Parallel Approach to Fine-tune Field Emission Displays Using a Genetic Algorithm Journal Article Latin American Conference on High Performance Computing (CLCAR), 2013. BibTeX @article{CAS13CLCAR,
title = {A Parallel Approach to Fine-tune Field Emission Displays Using a Genetic Algorithm},
author = {Márcio Castro and Pedro Velho and Luiz Gustavo Fernandes and Jean-François Méhaut},
year = {2013},
date = {2013-01-01},
journal = {Latin American Conference on High Performance Computing (CLCAR)},
address = {San José, Costa Rica},
keywords = {},
pubstate = {published},
tppubtype = {article}
}
|
Griebler, Dalvan; Fernandes, Luiz G Towards a Domain-Specific Language for Patterns-Oriented Parallel Programming Inproceedings doi Programming Languages - 17th Brazilian Symposium - SBLP, pp. 105-119, Springer Berlin Heidelberg, Brasilia, Brazil, 2013. Resumo | Links | BibTeX @inproceedings{GRIEBLER:SBLP:13,
title = {Towards a Domain-Specific Language for Patterns-Oriented Parallel Programming},
author = {Dalvan Griebler and Luiz G. Fernandes},
url = {http://dx.doi.org/10.1007/978-3-642-40922-6_8},
doi = {10.1007/978-3-642-40922-6_8},
year = {2013},
date = {2013-10-01},
booktitle = {Programming Languages - 17th Brazilian Symposium - SBLP},
volume = {8129},
pages = {105-119},
publisher = {Springer Berlin Heidelberg},
address = {Brasilia, Brazil},
series = {Lecture Notes in Computer Science},
abstract = {Pattern-oriented programming has been used in parallel code development for many years now. During this time, several tools (mainly frameworks and libraries) proposed the use of patterns based on programming primitives or templates. The implementation of patterns using those tools usually requires human expertise to correctly set up communication/synchronization among processes. In this work, we propose the use of a Domain Specific Language to create pattern-oriented parallel programs (DSL-POPP). This approach has the advantage of offering a higher programming abstraction level in which communication/synchronization among processes is hidden from programmers. We compensate the reduction in programming flexibility offering the possibility to use combined and/or nested parallel patterns (i.e., parallelism in levels), allowing the design of more complex parallel applications. We conclude this work presenting an experiment in which we develop a parallel application exploiting combined and nested parallel patterns in order to demonstrate the main properties of DSL-POPP.},
keywords = {},
pubstate = {published},
tppubtype = {inproceedings}
}
Pattern-oriented programming has been used in parallel code development for many years now. During this time, several tools (mainly frameworks and libraries) proposed the use of patterns based on programming primitives or templates. The implementation of patterns using those tools usually requires human expertise to correctly set up communication/synchronization among processes. In this work, we propose the use of a Domain Specific Language to create pattern-oriented parallel programs (DSL-POPP). This approach has the advantage of offering a higher programming abstraction level in which communication/synchronization among processes is hidden from programmers. We compensate the reduction in programming flexibility offering the possibility to use combined and/or nested parallel patterns (i.e., parallelism in levels), allowing the design of more complex parallel applications. We conclude this work presenting an experiment in which we develop a parallel application exploiting combined and nested parallel patterns in order to demonstrate the main properties of DSL-POPP. |
Griebler, Dalvan; Fernandes, Luiz Gustavo DSL-POPP: Linguagem Específica de Domínio para Programação Paralela Orientada a Padrões Inproceedings Escola Regional de Alto Desempenho (ERAD/RS), pp. 2, Sociedade Brasileira de Computação (SBC), Porto Alegre, RS, BR, 2013. Resumo | Links | BibTeX @inproceedings{GRIEBLER:ERAD:13,
title = {DSL-POPP: Linguagem Específica de Domínio para Programação Paralela Orientada a Padrões},
author = {Dalvan Griebler and Luiz Gustavo Fernandes},
url = {https://gmap.pucrs.br/dalvan/papers/2013/CR_ERAD_2013.pdf},
year = {2013},
date = {2013-03-01},
booktitle = {Escola Regional de Alto Desempenho (ERAD/RS)},
pages = {2},
publisher = {Sociedade Brasileira de Computação (SBC)},
address = {Porto Alegre, RS, BR},
abstract = {A proposta deste trabalho é induzir o programador a desenvolver programas orientados a padrões paralelos, que implementados na interface de uma linguagem específica de domínio ajudam a reduzir o esforço de programação sem comprometer o desempenho de uma aplicação. Resultados experimentais com o padrão mestre/escravo mostraram um bom desempenho nos algoritmos paralelizados.},
keywords = {},
pubstate = {published},
tppubtype = {inproceedings}
}
A proposta deste trabalho é induzir o programador a desenvolver programas orientados a padrões paralelos, que implementados na interface de uma linguagem específica de domínio ajudam a reduzir o esforço de programação sem comprometer o desempenho de uma aplicação. Resultados experimentais com o padrão mestre/escravo mostraram um bom desempenho nos algoritmos paralelizados. |
Teodoro, Silvana; do Carmo, Andriele Busatto; Fernandes, Luiz Gustavo Energy Efficiency Management in Computational Grids Through Energy-aware Scheduling Inproceedings doi Proceedings of the 28th Annual ACM Symposium on Applied Computing, pp. 1163–1168, ACM, Coimbra, Portugal, 2013, ISBN: 978-1-4503-1656-9. Links | BibTeX @inproceedings{Teodoro:2013:EEM:2480362.2480581,
title = {Energy Efficiency Management in Computational Grids Through Energy-aware Scheduling},
author = {Silvana Teodoro and Andriele Busatto do Carmo and Luiz Gustavo Fernandes},
url = {http://doi.acm.org/10.1145/2480362.2480581},
doi = {10.1145/2480362.2480581},
isbn = {978-1-4503-1656-9},
year = {2013},
date = {2013-01-01},
booktitle = {Proceedings of the 28th Annual ACM Symposium on Applied Computing},
pages = {1163--1168},
publisher = {ACM},
address = {Coimbra, Portugal},
series = {SAC '13},
keywords = {},
pubstate = {published},
tppubtype = {inproceedings}
}
|
Lara, Viviane L; Kolberg, Mariana; Fernandes, Luiz Gustavo Resolução Paralela Verificada de Sistemas de Equações Lineares: uma Análise do Impacto no Desempenho da Técnica DVFS para Eficiência Energética Inproceedings 13a Escola Regional de Alto Desempenho (ERAD), pp. 107-108, Sociedade Brasileira de Computação, Porto Alegre, Brazil, 2013. Links | BibTeX @inproceedings{LAR13ERAD,
title = {Resolução Paralela Verificada de Sistemas de Equações Lineares: uma Análise do Impacto no Desempenho da Técnica DVFS para Eficiência Energética},
author = {Viviane L Lara and Mariana Kolberg and Luiz Gustavo Fernandes},
url = {https://gmap.pucrs.br/gmap/files/publications/articles/432ba2a7ccec14f69cb4bf27afcf792b.pdf},
year = {2013},
date = {2013-03-01},
booktitle = {13a Escola Regional de Alto Desempenho (ERAD)},
pages = {107-108},
publisher = {Sociedade Brasileira de Computação},
address = {Porto Alegre, Brazil},
keywords = {},
pubstate = {published},
tppubtype = {inproceedings}
}
|
Teodoro, Silvana Algoritmos de Escalonamento para Grades Computacionais voltados à Eficiência Energética Masters Thesis PUCRS, 2013. Links | BibTeX @mastersthesis{TEODORO:DM:13,
title = {Algoritmos de Escalonamento para Grades Computacionais voltados à Eficiência Energética},
author = {Silvana Teodoro},
url = {https://gmap.pucrs.br/gmap/files/publications/articles/42fed21d426d0772e6f918691f47833c.pdf},
year = {2013},
date = {2013-01-01},
address = {Porto Alegre, Brazil},
school = {PUCRS},
keywords = {},
pubstate = {published},
tppubtype = {mastersthesis}
}
|
Lara, Viviane Linck Resolução Paralela Verificada de Sistemas de Equações Lineares: Uma Abordagem para Eficiência Energética Utilizando DVFS Masters Thesis PUCRS, 2013. Links | BibTeX @mastersthesis{LARA:DM:13,
title = {Resolução Paralela Verificada de Sistemas de Equações Lineares: Uma Abordagem para Eficiência Energética Utilizando DVFS},
author = {Viviane Linck Lara},
url = {http://repositorio.pucrs.br/dspace/handle/10923/7793},
year = {2013},
date = {2013-01-01},
address = {Porto Alegre, Brazil},
school = {PUCRS},
keywords = {},
pubstate = {published},
tppubtype = {mastersthesis}
}
|
2012
|
Castro, Márcio ; Góes, Luís Fabrício Wanderley ; Fernandes, Luiz Gustavo ; Méhaut, Jean-François Dynamic Thread Mapping Based on Machine Learning for Transactional Memory Applications Inproceedings doi 18th International Conference, Euro-Par, pp. 465-476, Springer Berlin Heidelberg, Rhodes Island, Greece, 2012. Links | BibTeX @inproceedings{CAS12EUROPAR,
title = {Dynamic Thread Mapping Based on Machine Learning for Transactional Memory Applications},
author = {Castro, Márcio and Góes, Luís Fabrício Wanderley and Fernandes, Luiz Gustavo and Méhaut, Jean-François},
doi = {10.1007/978-3-642-32820-6_47},
year = {2012},
date = {2012-08-01},
booktitle = {18th International Conference, Euro-Par},
pages = {465-476},
publisher = {Springer Berlin Heidelberg},
address = {Rhodes Island, Greece},
keywords = {},
pubstate = {published},
tppubtype = {inproceedings}
}
|
Griebler, Dalvan Proposta de uma Linguagem Específica de Domínio de Programação Paralela Orientada a Padrões Paralelos: Um Estudo de Caso Baseado no Padrão Mestre/Escravo para Arquiteturas Multi-Core Masters Thesis Faculdade de Informática - PPGCC - PUCRS, 2012. Resumo | Links | BibTeX @mastersthesis{GRIEBLER:DM:12,
title = {Proposta de uma Linguagem Específica de Domínio de Programação Paralela Orientada a Padrões Paralelos: Um Estudo de Caso Baseado no Padrão Mestre/Escravo para Arquiteturas Multi-Core},
author = {Dalvan Griebler},
url = {http://tede.pucrs.br/tde_busca/arquivo.php?codArquivo=4265},
year = {2012},
date = {2012-03-01},
address = {Porto Alegre, Brazil},
school = {Faculdade de Informática - PPGCC - PUCRS},
abstract = {This work proposes a Domain-Specific Language for Parallel Patterns Oriented Parallel Programming (LED-PPOPP). Its main purpose is to provide a way to decrease the amount of effort necessary to develop parallel programs, offering a way to guide developers through patterns which are implemented by the language interface. The idea is to exploit this approach avoiding large performance losses in the applications. Patterns are specialized solutions, previously studied, and used to solve a frequent problem. Thus, parallel patterns offer a higher abstraction level to organize the algorithms in the exploitation of parallelism. They also can be easily learned by inexperienced programmers and software engineers. This work carried out a case study based on the Master/Slave pattern, focusing on the parallelization of algorithms for multi-core architectures. The implementation was validated through experiments to evaluate the programming effort to write code in LED-PPOPP and the performance achieved by the parallel code automatically generated. The obtained results let us conclude that a significant reduction in the parallel programming effort occurred in comparison to the Pthreads library utilization. Additionally, the final performance of the parallelized algorithms confirms that the parallelization with LED-PPOPP does not bring on significant losses related to parallelization using OpenMP in most of the all experiments carried out.},
keywords = {},
pubstate = {published},
tppubtype = {mastersthesis}
}
This work proposes a Domain-Specific Language for Parallel Patterns Oriented Parallel Programming (LED-PPOPP). Its main purpose is to provide a way to decrease the amount of effort necessary to develop parallel programs, offering a way to guide developers through patterns which are implemented by the language interface. The idea is to exploit this approach avoiding large performance losses in the applications. Patterns are specialized solutions, previously studied, and used to solve a frequent problem. Thus, parallel patterns offer a higher abstraction level to organize the algorithms in the exploitation of parallelism. They also can be easily learned by inexperienced programmers and software engineers. This work carried out a case study based on the Master/Slave pattern, focusing on the parallelization of algorithms for multi-core architectures. The implementation was validated through experiments to evaluate the programming effort to write code in LED-PPOPP and the performance achieved by the parallel code automatically generated. The obtained results let us conclude that a significant reduction in the parallel programming effort occurred in comparison to the Pthreads library utilization. Additionally, the final performance of the parallelized algorithms confirms that the parallelization with LED-PPOPP does not bring on significant losses related to parallelization using OpenMP in most of the all experiments carried out. |
Rui, Fernando Furlan Uma Avaliação Comparativa de Sistemas de Memória Transacional de Software e seus Benchmarks Masters Thesis PUCRS, 2012. BibTeX @mastersthesis{RUI:DM:12,
title = {Uma Avaliação Comparativa de Sistemas de Memória Transacional de Software e seus Benchmarks},
author = {Fernando Furlan Rui},
year = {2012},
date = {2012-01-01},
address = {Porto Alegre, Brazil},
school = {PUCRS},
keywords = {},
pubstate = {published},
tppubtype = {mastersthesis}
}
|
2011
|
Goerl, Bernardo; Milani, Cleber Roberto; Raeder, Mateus; Kolberg, Mariana; Fernandes, Luiz Gustavo Bibliotecas e Ferramentas para Computação Numérica de Alto Desempenho Journal Article Anais 11a Escola Regional de Alto Desempenho (ERAD), 1 (1), pp. 225-228, 2011. Links | BibTeX @article{GOE11ERAD,
title = {Bibliotecas e Ferramentas para Computação Numérica de Alto Desempenho},
author = {Bernardo Goerl and Cleber Roberto Milani and Mateus Raeder and Mariana Kolberg and Luiz Gustavo Fernandes},
url = {https://gmap.pucrs.br/gmap/files/publications/articles/d77044c5e46d262b5b019279c357b0b8.pdf},
year = {2011},
date = {2011-01-01},
journal = {Anais 11a Escola Regional de Alto Desempenho (ERAD)},
volume = {1},
number = {1},
pages = {225-228},
publisher = {Sociedade Brasileira de Computação (SBC)},
address = {Porto Alegre, Brasil},
keywords = {},
pubstate = {published},
tppubtype = {article}
}
|
Pires, Victoria Ramos; Fonseca, Carolina Marques; Nemetz, Rafael; Raeder, Mateus; Fernandes, Luiz Gustavo Escalonamento Dinâmico Nao-Preemptivo para Sistemas Distribuídos de Impressão Journal Article Anais 11a Escola Regional de Alto Desempenho (ERAD), 1 (1), pp. 197-200, 2011. Links | BibTeX @article{PIR11SBC,
title = {Escalonamento Dinâmico Nao-Preemptivo para Sistemas Distribuídos de Impressão},
author = {Victoria Ramos Pires and Carolina Marques Fonseca and Rafael Nemetz and Mateus Raeder and Luiz Gustavo Fernandes},
url = {https://gmap.pucrs.br/gmap/files/publications/articles/10cf3a3439a7e65cfa693de7d2fcec5b.pdf},
year = {2011},
date = {2011-01-01},
journal = {Anais 11a Escola Regional de Alto Desempenho (ERAD)},
volume = {1},
number = {1},
pages = {197-200},
publisher = {Sociedade Brasileira de Computação (SBC)},
address = {Porto Alegre, Brasil},
keywords = {},
pubstate = {published},
tppubtype = {article}
}
|
Castro, Márcio ; Georgiev, Kiril ; Marangozova-Martin, Vania ; Méhaut, Jean-François ; Fernandes, Luiz Gustavo ; Santana, Miguel Analysis and Tracing of Applications Based on Software Transactional Memory on Multicore Architectures Journal Article doi 19th Euromicro International Conference on Parallel, Distributed and Network-Based Computing (PDP), pp. 199–206, 2011. Links | BibTeX @article{CAS11PDP,
title = {Analysis and Tracing of Applications Based on Software Transactional Memory on Multicore Architectures},
author = {Castro, Márcio and Georgiev, Kiril and Marangozova-Martin, Vania and Méhaut, Jean-François and Fernandes, Luiz Gustavo and Santana, Miguel},
doi = {10.1109/PDP.2011.27},
year = {2011},
date = {2011-01-01},
journal = {19th Euromicro International Conference on Parallel, Distributed and Network-Based Computing (PDP)},
pages = {199--206},
publisher = {IEEE Computer Society},
address = {Ayia Napa, Cyprus},
keywords = {},
pubstate = {published},
tppubtype = {article}
}
|
Raeder, Mateus; Griebler, Dalvan; Baldo, Lucas; Fernandes, Luiz G Performance Prediction of Parallel Applications with Parallel Patterns Using Stochastic Methods Inproceedings doi Sistemas Computacionais (WSCAD-SSC), XII Simpósio em Sistemas Computacionais de Alto Desempenho, pp. 1-13, IEEE, Espírito Santo, Brasil, 2011. Resumo | Links | BibTeX @inproceedings{RAEDER:WSCAD:11,
title = {Performance Prediction of Parallel Applications with Parallel Patterns Using Stochastic Methods},
author = {Mateus Raeder and Dalvan Griebler and Lucas Baldo and Luiz G. Fernandes},
url = {https://doi.org/10.1109/WSCAD-SSC.2011.18},
doi = {10.1109/WSCAD-SSC.2011.18},
year = {2011},
date = {2011-10-01},
booktitle = {Sistemas Computacionais (WSCAD-SSC), XII Simpósio em Sistemas Computacionais de Alto Desempenho},
pages = {1-13},
publisher = {IEEE},
address = {Espírito Santo, Brasil},
abstract = {One of the main problems in the high performance computing area is the difficulty to define the best strategy to parallelize an application. In this context, the use of analytical methods to evaluate the performance behavior of such applications seems to be an interesting alternative and can help to identify the best implementation strategies. In this work, the Stochastic Automata Network formalism is adopted to model and evaluate the performance of parallel applications, specially developed for clusters of workstations platforms. The methodology used is based on the construction of generic models to describe classical parallel implementation schemes, like Master/Slave, Parallel Phases, Pipeline and Divide and Conquer. Those models are adapted to represent cases of real applications through the definition of input parameters values. Finally, aiming to verify the accuracy of the adopted technique, some comparisons with real applications implementation results are presented.},
keywords = {},
pubstate = {published},
tppubtype = {inproceedings}
}
One of the main problems in the high performance computing area is the difficulty to define the best strategy to parallelize an application. In this context, the use of analytical methods to evaluate the performance behavior of such applications seems to be an interesting alternative and can help to identify the best implementation strategies. In this work, the Stochastic Automata Network formalism is adopted to model and evaluate the performance of parallel applications, specially developed for clusters of workstations platforms. The methodology used is based on the construction of generic models to describe classical parallel implementation schemes, like Master/Slave, Parallel Phases, Pipeline and Divide and Conquer. Those models are adapted to represent cases of real applications through the definition of input parameters values. Finally, aiming to verify the accuracy of the adopted technique, some comparisons with real applications implementation results are presented. |
Griebler, Dalvan; Raeder, Mateus; Fernandes, Luiz Gustavo Padrões e Frameworks de Programação Paralela em Ambientes Multi-Core Inproceedings Escola Regional de Alto Desempenho (ERAD/RS), pp. 2, Sociedade Brasileira de Computação (SBC), Porto Alegre, RS, BR, 2011. Resumo | Links | BibTeX @inproceedings{GRIEBLER:ERAD:11,
title = {Padrões e Frameworks de Programação Paralela em Ambientes Multi-Core},
author = {Dalvan Griebler and Mateus Raeder and Luiz Gustavo Fernandes},
url = {https://gmap.pucrs.br/dalvan/papers/2011/CR_ERAD_2011.pdf},
year = {2011},
date = {2011-03-01},
booktitle = {Escola Regional de Alto Desempenho (ERAD/RS)},
pages = {2},
publisher = {Sociedade Brasileira de Computação (SBC)},
address = {Porto Alegre, RS, BR},
abstract = {Nos últimos anos, o mercado recente de estações de trabalho e servidores vem aumentando gradativamente a quantidade de núcleos e processadores, inserindo na sua programação o paralelismo, o que resultou no aumento da complexidade em lidar com este tipo de hardware. Neste cenário, é necessário a disponibilidade de mecanismos que possam fornecer escalabilidade e permitir a exploração de paralelismo nestas arquiteturas, conhecidas como multi-core. Não basta que tais arquiteturas multiprocessadas estejam disponíveis, se estas não são exploradas devidamente. Depuração, condições de corrida, sincronização de threads ou processos e controle de acesso aos dados são exemplos de fatores críticos para a programação destes ambientes paralelos. Novas maneiras de abstrair a complexidade em lidar com estes sistemas estão sendo estudadas, a fim de que a programação paralela seja algo menos complexo para os desenvolvedores de software. Padrões paralelos vêm sendo o alvo de constantes estudos com intuito de padronizar a programação.},
keywords = {},
pubstate = {published},
tppubtype = {inproceedings}
}
Nos últimos anos, o mercado recente de estações de trabalho e servidores vem aumentando gradativamente a quantidade de núcleos e processadores, inserindo na sua programação o paralelismo, o que resultou no aumento da complexidade em lidar com este tipo de hardware. Neste cenário, é necessário a disponibilidade de mecanismos que possam fornecer escalabilidade e permitir a exploração de paralelismo nestas arquiteturas, conhecidas como multi-core. Não basta que tais arquiteturas multiprocessadas estejam disponíveis, se estas não são exploradas devidamente. Depuração, condições de corrida, sincronização de threads ou processos e controle de acesso aos dados são exemplos de fatores críticos para a programação destes ambientes paralelos. Novas maneiras de abstrair a complexidade em lidar com estes sistemas estão sendo estudadas, a fim de que a programação paralela seja algo menos complexo para os desenvolvedores de software. Padrões paralelos vêm sendo o alvo de constantes estudos com intuito de padronizar a programação. |
Fernandes, Luiz Gustavo; Nunes, Thiago; Kolberg, Mariana; Giannetti, Fabio; Nemetz, Rafael; Cabeda, Alexis Job Profiling and Queue Management in High Performance Printing Inproceedings doi Computer Science - Research and Development(CSRD), pp. 1-20, Springer Berlin Heidelberg, Secaucus, NJ, USA, 2011. Links | BibTeX @inproceedings{FER11CSRD,
title = {Job Profiling and Queue Management in High Performance Printing},
author = {Luiz Gustavo Fernandes and Thiago Nunes and Mariana Kolberg and Fabio Giannetti and Rafael Nemetz and Alexis Cabeda},
doi = {10.1007/s00450-010-0134-0},
year = {2011},
date = {2011-05-01},
booktitle = {Computer Science - Research and Development(CSRD)},
pages = {1-20},
publisher = {Springer Berlin Heidelberg},
address = {Secaucus, NJ, USA},
keywords = {},
pubstate = {published},
tppubtype = {inproceedings}
}
|
Raeder, Mateus; Griebler, Dalvan; Ribeiro, Neumar; Fernandes, Luiz Gustavo; Castro, Márcio A Hybrid Parallel Version of ICTM for Cluster of NUMA Machines Inproceedings IADIS International Conference on Applied Computing (AC), pp. 291-298, IADIS Press, Rio de Janeiro, Brazil, 2011. Links | BibTeX @inproceedings{RAE11IADISAC,
title = {A Hybrid Parallel Version of ICTM for Cluster of NUMA Machines},
author = {Mateus Raeder and Dalvan Griebler and Neumar Ribeiro and Luiz Gustavo Fernandes and Márcio Castro},
url = {https://gmap.pucrs.br/gmap/files/publications/articles/10e0005e546d980503ab1cfecdd8a559.pdf},
year = {2011},
date = {2011-11-01},
booktitle = {IADIS International Conference on Applied Computing (AC)},
pages = {291-298},
publisher = {IADIS Press},
address = {Rio de Janeiro, Brazil},
keywords = {},
pubstate = {published},
tppubtype = {inproceedings}
}
|
Rui, Fernando Furlan ; Fernandes, Luiz Gustavo ; Raeder, Mateus Avaliação de Sistemas de Memórias Transacionais de Software Inproceedings 11a Escola Regional de Alto Desempenho (ERAD), pp. 95-96, Sociedade Brasileira de Computação, Porto Alegre, Brazil, 2011. Links | BibTeX @inproceedings{RUI11ERAD,
title = {Avaliação de Sistemas de Memórias Transacionais de Software},
author = {Rui, Fernando Furlan and Fernandes, Luiz Gustavo and Raeder, Mateus},
url = {https://gmap.pucrs.br/gmap/files/publications/articles/ee0bede1bc0f23529feabebe9203ee16.pdf},
year = {2011},
date = {2011-03-01},
booktitle = {11a Escola Regional de Alto Desempenho (ERAD)},
pages = {95-96},
publisher = {Sociedade Brasileira de Computação},
address = {Porto Alegre, Brazil},
keywords = {},
pubstate = {published},
tppubtype = {inproceedings}
}
|
Fonseca, Carolina Marques Otimizando o Escalonamento de Jobs no Processo de Rasterização de Documentos Personalizáveis Masters Thesis PUCRS, 2011. Links | BibTeX @mastersthesis{FONSECA:DM:11,
title = {Otimizando o Escalonamento de Jobs no Processo de Rasterização de Documentos Personalizáveis},
author = {Carolina Marques Fonseca},
url = {https://gmap.pucrs.br/gmap/files/publications/articles/c816a09f2ab077983a9ff40856a33a23.pdf},
year = {2011},
date = {2011-01-01},
address = {Porto Alegre, Brazil},
school = {PUCRS},
keywords = {},
pubstate = {published},
tppubtype = {mastersthesis}
}
|
Ribeiro, Neumar Silva Explorando Programação Híbrida no Contexto de Clusters de Máquinas NUMA Masters Thesis PUCRS, 2011. Links | BibTeX @mastersthesis{RIBEIRO:DM:11,
title = {Explorando Programação Híbrida no Contexto de Clusters de Máquinas NUMA},
author = {Neumar Silva Ribeiro},
url = {https://gmap.pucrs.br/gmap/files/publications/articles/55861ee97a2e33bdceeff48db81e493d.pdf},
year = {2011},
date = {2011-01-01},
address = {Porto Alegre, Brazil},
school = {PUCRS},
keywords = {},
pubstate = {published},
tppubtype = {mastersthesis}
}
|
Nemetz, Rafael Otimizando o Fluxo de Tarefas em Sistemas Distribuídos de Impressão: Um Algoritmo de Escalonamento Dinâmico Não Preemptivo Baseado em Mecanismo de Previsão Masters Thesis PUCRS, 2011. Links | BibTeX @mastersthesis{NEMETZ:DM:11,
title = {Otimizando o Fluxo de Tarefas em Sistemas Distribuídos de Impressão: Um Algoritmo de Escalonamento Dinâmico Não Preemptivo Baseado em Mecanismo de Previsão},
author = {Rafael Nemetz},
url = {https://gmap.pucrs.br/gmap/files/publications/articles/3a25211cd9fe741f2f5a3f12f86fe557.pdf},
year = {2011},
date = {2011-01-01},
address = {Porto Alegre, Brazil},
school = {PUCRS},
keywords = {},
pubstate = {published},
tppubtype = {mastersthesis}
}
|
Griebler, Dalvan; Fernandes, Luiz G Padrões e Frameworks de Programação Paralela em Arquiteturas Multi-Core Technical Report Faculdade de Informática - PPGCC - PUCRS Porto Alegre, Brazil, 2011. Resumo | Links | BibTeX @techreport{GRIEBLER:TR:11,
title = {Padrões e Frameworks de Programação Paralela em Arquiteturas Multi-Core},
author = {Dalvan Griebler and Luiz G. Fernandes},
url = {http://www3.pucrs.br/pucrs/files/uni/poa/facin/pos/relatoriostec/064.pdf},
year = {2011},
date = {2011-01-01},
address = {Porto Alegre, Brazil},
institution = {Faculdade de Informática - PPGCC - PUCRS},
abstract = {A computação paralela vem crescendo rapidamente em termos de desempenho, um dos adventos é o modelo arquitetural multi-core. Entretanto, não bastam estar disponíveis tais arquiteturas multiprocessadas, se estas não são exploradas devidamente. A maior parte dos programadores de código sequencial se negam a dedicar seus esforços para trabalhar com este paradigma, pela complexidade apresentada no tratamento de problemas. Depuração, condições de corrida, sincronização de threads ou processos e controle de acesso aos dados são exemplos de fatores críticos para estes ambientes paralelos. Novas maneiras de abstrair a complexidade em lidar com estes sistemas estão sendo estudadas, a fim de que a programação paralela seja algo comum para os desenvolvedores de software. Neste sentido, o objetivo deste trabalho é estudar e fazer um levantamento teórico sobre os mecanismos utilizados para melhorar a programação paralela em ambientes multi-core. Padrões paralelos vêm sendo o alvo de constantes estudos com intuito de padronizar a programação paralela. A padronização foi um dos primeiros passos em direção a melhores implementações para o espaço de projeto de algoritmos paralelos. No entanto, uma implementação eficiente com estes padrões nem sempre é possível. Depende do programador se a modelagem e os cuidados com relação ao acesso de dados foram corretamente tratados. Padrões paralelos determinísticos tornaram-se o mais atual objeto de pesquisa no cenário de programação paralela (multi-core). O propósito deles é possíbilitar o desenvolvimento de programas eficientes mantendo uma única ordem na execução, similar ao que se tem nos algoritmos sequenciais. Além disso, fornecem determinismo na execução dos programas eliminando a necessidade de condições de corrida. O desenvolvimento de frameworks passou a ser uma solução para ajudar os programadores nesta tarefa, abstraindo parte da complexidade em lidar com os problemas frequentes, visando rapidez e facilidade na aprendizagem e desenvolvimento de programas paralelos.},
keywords = {},
pubstate = {published},
tppubtype = {techreport}
}
A computação paralela vem crescendo rapidamente em termos de desempenho, um dos adventos é o modelo arquitetural multi-core. Entretanto, não bastam estar disponíveis tais arquiteturas multiprocessadas, se estas não são exploradas devidamente. A maior parte dos programadores de código sequencial se negam a dedicar seus esforços para trabalhar com este paradigma, pela complexidade apresentada no tratamento de problemas. Depuração, condições de corrida, sincronização de threads ou processos e controle de acesso aos dados são exemplos de fatores críticos para estes ambientes paralelos. Novas maneiras de abstrair a complexidade em lidar com estes sistemas estão sendo estudadas, a fim de que a programação paralela seja algo comum para os desenvolvedores de software. Neste sentido, o objetivo deste trabalho é estudar e fazer um levantamento teórico sobre os mecanismos utilizados para melhorar a programação paralela em ambientes multi-core. Padrões paralelos vêm sendo o alvo de constantes estudos com intuito de padronizar a programação paralela. A padronização foi um dos primeiros passos em direção a melhores implementações para o espaço de projeto de algoritmos paralelos. No entanto, uma implementação eficiente com estes padrões nem sempre é possível. Depende do programador se a modelagem e os cuidados com relação ao acesso de dados foram corretamente tratados. Padrões paralelos determinísticos tornaram-se o mais atual objeto de pesquisa no cenário de programação paralela (multi-core). O propósito deles é possíbilitar o desenvolvimento de programas eficientes mantendo uma única ordem na execução, similar ao que se tem nos algoritmos sequenciais. Além disso, fornecem determinismo na execução dos programas eliminando a necessidade de condições de corrida. O desenvolvimento de frameworks passou a ser uma solução para ajudar os programadores nesta tarefa, abstraindo parte da complexidade em lidar com os problemas frequentes, visando rapidez e facilidade na aprendizagem e desenvolvimento de programas paralelos. |
2010
|
Castro, M; Georgiev, K; Marangonzova-Martin, V; Méhaut, J F; Fernandes, Luiz Gustavo; Santana, M Analyzing Software Transactional Memory Applications by Tracing Transactions Journal Article Grenoble: INRIA, 1 (1), pp. 1-24, 2010. Links | BibTeX @article{CAS10INRIA,
title = {Analyzing Software Transactional Memory Applications by Tracing Transactions},
author = {M. Castro and K. Georgiev and V. Marangonzova-Martin and J. F. Méhaut and Luiz Gustavo Fernandes and M. Santana},
url = {https://gmap.pucrs.br/gmap/files/publications/articles/8441b5ba8774cff742063a0ba66715a5.pdf},
year = {2010},
date = {2010-01-01},
journal = {Grenoble: INRIA},
volume = {1},
number = {1},
pages = {1-24},
publisher = {INRIA},
address = {Grenoble, Portugal},
keywords = {},
pubstate = {published},
tppubtype = {article}
}
|
Kolberg, Mariana; Fernandes, Luiz Gustavo; Milani, Cleber Roberto Intervals on Self-verified Linear Systems Solver for Multicore Computers Journal Article Interval Mathematics and Connections in Teaching and Scientific Developmen (IntMath-TSD), 1 (1), pp. 35-42, 2010. Links | BibTeX @article{FER10IntMathTSD,
title = {Intervals on Self-verified Linear Systems Solver for Multicore Computers},
author = {Mariana Kolberg and Luiz Gustavo Fernandes and Cleber Roberto Milani},
url = {https://gmap.pucrs.br/gmap/files/publications/articles/d2a19a6490a0f8a243ddb15782f1a3b3.pdf},
year = {2010},
date = {2010-01-01},
journal = {Interval Mathematics and Connections in Teaching and Scientific Developmen (IntMath-TSD)},
volume = {1},
number = {1},
pages = {35-42},
address = {Universidade Federal de Pelotas, Ed. Universitária},
keywords = {},
pubstate = {published},
tppubtype = {article}
}
|
Kolberg, Mariana; Fernandes, Luiz Gustavo; Claudio, D M Parallel Self-verified Linear System Solver on Cluster Computers Journal Article Interval Mathematics and Connections in Teaching and Scientific Development, 1 (1), pp. 43-50, 2010. Links | BibTeX @article{KOL10IntMathTSD,
title = {Parallel Self-verified Linear System Solver on Cluster Computers},
author = {Mariana Kolberg and Luiz Gustavo Fernandes and D. M. Claudio},
url = {https://gmap.pucrs.br/gmap/files/publications/articles/000259a328a840b445d92337ab6707ce.pdf},
year = {2010},
date = {2010-01-01},
journal = {Interval Mathematics and Connections in Teaching and Scientific Development},
volume = {1},
number = {1},
pages = {43-50},
address = {Universidade Federal de Pelotas, Ed. Universitária},
keywords = {},
pubstate = {published},
tppubtype = {article}
}
|
Carissimi, Alexandre; Geyer, Claudio FR; Maillard, Nicolas; Navaux, Philippe OA; Cavalheiro, Gerson GH; Pilla, Maurício L; Yamin, Adenauer C; Charao, Andréa S; Stein, Benhur; Rose, César AF De; others, Energy-Aware Scheduling of Parallel Programs Journal Article 3rd Latin American Conference on High Performance Computing (CLCAR), pp. 95-101, 2010. Links | BibTeX @article{CAR10CLCAR,
title = {Energy-Aware Scheduling of Parallel Programs},
author = {Alexandre Carissimi and Claudio FR Geyer and Nicolas Maillard and Philippe OA Navaux and Gerson GH Cavalheiro and Maurício L Pilla and Adenauer C Yamin and Andréa S Charao and Benhur Stein and César AF De Rose and others},
url = {https://gmap.pucrs.br/gmap/files/publications/articles/9fd136f14f71f48d9ac3eabe9335a4f2.pdf},
year = {2010},
date = {2010-01-01},
journal = {3rd Latin American Conference on High Performance Computing (CLCAR)},
pages = {95-101},
address = {Gramado, Brasil},
keywords = {},
pubstate = {published},
tppubtype = {article}
}
|
Milani, Cleber Roberto; Kolberg, Mariana; Fernandes, Luiz Gustavo Solving Dense Interval Linear Systems with Verified Computing on Multicore Architectures Inproceedings doi VECPAR, pp. 435-448, Springer Berlin Heidelberg, University of California, Berkeley, USA, 2010. Links | BibTeX @inproceedings{CLE10VECPAR,
title = {Solving Dense Interval Linear Systems with Verified Computing on Multicore Architectures},
author = {Cleber Roberto Milani and Mariana Kolberg and Luiz Gustavo Fernandes},
doi = {10.1007/978-3-642-19328-6_39},
year = {2010},
date = {2010-06-01},
booktitle = {VECPAR},
pages = {435-448},
publisher = {Springer Berlin Heidelberg},
address = {University of California, Berkeley, USA},
keywords = {},
pubstate = {published},
tppubtype = {inproceedings}
}
|
Breitenbach, Maiquel; Fonseca, Carolina; Raeder, Mateus; Kolberg, Mariana; Fernandes, Luiz Gustavo Balanceamento de Carga na Rasterização de Documentos PDF Inproceedings 10a Escola Regional de Alto Desempenho (ERAD), pp. 185-188, Sociedade Brasileira de Computação, Passo Fundo, RS, 2010. Links | BibTeX @inproceedings{BRE10ERAD,
title = {Balanceamento de Carga na Rasterização de Documentos PDF},
author = {Maiquel Breitenbach and Carolina Fonseca and Mateus Raeder and Mariana Kolberg and Luiz Gustavo Fernandes},
url = {https://gmap.pucrs.br/gmap/files/publications/articles/9e3574eb1ce3fed9ebb0a115deee6a50.pdf},
year = {2010},
date = {2010-03-01},
booktitle = {10a Escola Regional de Alto Desempenho (ERAD)},
pages = {185-188},
publisher = {Sociedade Brasileira de Computação},
address = {Passo Fundo, RS},
keywords = {},
pubstate = {published},
tppubtype = {inproceedings}
}
|
Raeder, Mateus ; Musse, Soraia R; Fernandes, Luiz Gustavo Computação de Alto Desempenho na Simulação de Multidões Inproceedings 10a Escola Regional de Alto Desempenho (ERAD), pp. 99-100, Sociedade Brasileira de Computação, Passo Fundo, Brazil, 2010. Links | BibTeX @inproceedings{RAE10ERAD,
title = {Computação de Alto Desempenho na Simulação de Multidões},
author = {Raeder, Mateus and Musse, Soraia R and Fernandes, Luiz Gustavo},
url = {https://gmap.pucrs.br/gmap/files/publications/articles/5eb4d8af8601323d56da8d989b4c3f85.pdf},
year = {2010},
date = {2010-03-01},
booktitle = {10a Escola Regional de Alto Desempenho (ERAD)},
pages = {99-100},
publisher = {Sociedade Brasileira de Computação},
address = {Passo Fundo, Brazil},
keywords = {},
pubstate = {published},
tppubtype = {inproceedings}
}
|
Ribeiro, N; Raeder, Mateus; Fernandes, Luiz Gustavo Melhorando o Desempenho do NUMA-ICTM Utilizando Programação Híbrida Inproceedings 10a Escola Regional de Alto Desempenho (ERAD), pp. 123-124, Sociedade Brasileira de Computação, Passo Fundo, Brazil, 2010. Links | BibTeX @inproceedings{RIB10ERAD,
title = {Melhorando o Desempenho do NUMA-ICTM Utilizando Programação Híbrida},
author = {N. Ribeiro and Mateus Raeder and Luiz Gustavo Fernandes},
url = {https://gmap.pucrs.br/gmap/files/publications/articles/c98fa4005d4c57223faeadefb79b4b18.pdf},
year = {2010},
date = {2010-03-01},
booktitle = {10a Escola Regional de Alto Desempenho (ERAD)},
pages = {123-124},
publisher = {Sociedade Brasileira de Computação},
address = {Passo Fundo, Brazil},
keywords = {},
pubstate = {published},
tppubtype = {inproceedings}
}
|
Nemetz, R; Raeder, Mateus; Kolberg, Mariana; Fernandes, Luiz Gustavo Acelerando o Fluxo Global de Tarefas no Processo de Impressão Distribuída Inproceedings 10a Escola Regional de Alto Desempenho (ERAD), pp. 87-88, Sociedade Brasileira de Computação, Passo Fundo, Brazil, 2010. Links | BibTeX @inproceedings{NEM10ERAD,
title = {Acelerando o Fluxo Global de Tarefas no Processo de Impressão Distribuída},
author = {R. Nemetz and Mateus Raeder and Mariana Kolberg and Luiz Gustavo Fernandes},
url = {https://gmap.pucrs.br/gmap/files/publications/articles/af405b6191b6cba04f9ae304430d6ada.pdf},
year = {2010},
date = {2010-03-01},
booktitle = {10a Escola Regional de Alto Desempenho (ERAD)},
pages = {87-88},
publisher = {Sociedade Brasileira de Computação},
address = {Passo Fundo, Brazil},
keywords = {},
pubstate = {published},
tppubtype = {inproceedings}
}
|
Milani, Cleber Roberto; Kolberg, Mariana; Fernandes, Luiz Gustavo Resolução Verificada de Sistemas Lineares Intervalares Densos de Grande Porte em Arquiteturas Multicore Inproceedings 10a Escola Regional de Alto Desempenho (ERAD), pp. 135-136, Sociedade Brasileira de Computação, Passo Fundo, Brazil, 2010. Links | BibTeX @inproceedings{MIL10ERAD,
title = {Resolução Verificada de Sistemas Lineares Intervalares Densos de Grande Porte em Arquiteturas Multicore},
author = {Cleber Roberto Milani and Mariana Kolberg and Luiz Gustavo Fernandes},
url = {https://gmap.pucrs.br/gmap/files/publications/articles/ae186171074f54d0d8745c84a27c664b.pdf},
year = {2010},
date = {2010-03-01},
booktitle = {10a Escola Regional de Alto Desempenho (ERAD)},
pages = {135-136},
publisher = {Sociedade Brasileira de Computação},
address = {Passo Fundo, Brazil},
keywords = {},
pubstate = {published},
tppubtype = {inproceedings}
}
|
Milani, Cleber Roberto Computação Verificada Aplicada à Resolução de Sistemas Lineares Intervalares Densos em Arquiteturas Multicore Masters Thesis PUCRS, 2010. Links | BibTeX @mastersthesis{MILANI:DM:10,
title = {Computação Verificada Aplicada à Resolução de Sistemas Lineares Intervalares Densos em Arquiteturas Multicore},
author = {Cleber Roberto Milani},
url = {https://gmap.pucrs.br/gmap/files/publications/articles/272980ccb156c75a298ac99c2e9c1b46.pdf},
year = {2010},
date = {2010-01-01},
address = {Porto Alegre, Brazil},
school = {PUCRS},
keywords = {},
pubstate = {published},
tppubtype = {mastersthesis}
}
|
Fonseca, Carolina Marques Otimizando o Escalonamento de Jobs no Processo de Rasterização de Documentos Personalizáveis Masters Thesis PUCRS, 2010. Links | BibTeX @mastersthesis{FON10ERAD,
title = {Otimizando o Escalonamento de Jobs no Processo de Rasterização de Documentos Personalizáveis},
author = {Fonseca, Carolina Marques},
url = {https://gmap.pucrs.br/gmap/files/publications/articles/955c64894cccde9609982055785b3a28.pdf},
year = {2010},
date = {2010-03-01},
booktitle = {10a Escola Regional de Alto Desempenho (ERAD)},
pages = {125-126},
publisher = {Sociedade Brasileira de Computacao},
school = {PUCRS},
keywords = {},
pubstate = {published},
tppubtype = {mastersthesis}
}
|
2009
|
Ribeiro, Christiane Pousa ; Mehaut, Jean-Francois ; Carissimi, Alexandre ; Castro, Marcio ; Fernandes, Luiz Gustavo Memory Affinity for Hierarchical Shared Memory Multiprocessors Journal Article doi 21st International Symposium on Computer Architecture and High Performance Computing (SBAC-PAD), 1 (1), pp. 1-8, 2009. Links | BibTeX @article{RIB09SBACPAD,
title = {Memory Affinity for Hierarchical Shared Memory Multiprocessors},
author = {Ribeiro, Christiane Pousa and Mehaut, Jean-Francois and Carissimi, Alexandre and Castro, Marcio and Fernandes, Luiz Gustavo},
doi = {10.1109/SBAC-PAD.2009.16},
year = {2009},
date = {2009-01-01},
journal = {21st International Symposium on Computer Architecture and High Performance Computing (SBAC-PAD)},
volume = {1},
number = {1},
pages = {1-8},
publisher = {IEEE},
address = {São Paulo, Brazil},
keywords = {},
pubstate = {published},
tppubtype = {article}
}
|
Ribeiro, Christiane Pousa ; Castro, Márcio ; Fernandes, Luiz Gustavo ; Dupros, Fabrice ; Carissimi, Alexandre ; Méhaut, Jean-François High Performance Applications on Hierarchical Shared Memory Multiprocessors Journal Article Colóquio em Informática: Brasil / INRIA, Cooperações, Avanços e Desafios (COLIBRI), 1 (1), pp. 1-4, 2009. Links | BibTeX @article{RIB09COLIBRI,
title = {High Performance Applications on Hierarchical Shared Memory Multiprocessors},
author = {Ribeiro, Christiane Pousa and Castro, Márcio and Fernandes, Luiz Gustavo and Dupros, Fabrice and Carissimi, Alexandre and Méhaut, Jean-François},
url = {https://gmap.pucrs.br/gmap/files/publications/articles/6fa5268d96d68bef8e0c781ceb30dcb9.pdf},
year = {2009},
date = {2009-01-01},
journal = {Colóquio em Informática: Brasil / INRIA, Cooperações, Avanços e Desafios (COLIBRI)},
volume = {1},
number = {1},
pages = {1-4},
address = {Bento Gonçalves, Brazil},
keywords = {},
pubstate = {published},
tppubtype = {article}
}
|
Velho, Pedro; Fernandes, Luiz Gustavo Solving Analytical Structured Formalisms in Parallel Using Slice Algorithm Journal Article 2nd Latin American Conference on High Performance Computing (CLCAR), pp. 1-6, 2009. Links | BibTeX @article{VEL09CLCAR,
title = {Solving Analytical Structured Formalisms in Parallel Using Slice Algorithm},
author = {Pedro Velho and Luiz Gustavo Fernandes},
url = {https://gmap.pucrs.br/gmap/files/publications/articles/d7ca96be8b2b67fd97a3a071f5220f9a.pdf},
year = {2009},
date = {2009-01-01},
journal = {2nd Latin American Conference on High Performance Computing (CLCAR)},
pages = {1-6},
address = {Merida, Venezuela},
keywords = {},
pubstate = {published},
tppubtype = {article}
}
|
Nunes, Thiago; Raeder, Mateus; Kolberg, Mariana; Fernandes, Luiz Gustavo; Cabeda, Alexis; Giannetti, Fabio High Performance Printing: Increasing Personalized Documents Rendering through PPML Jobs Profiling and Scheduling Inproceedings doi Computational Science and Engineering, pp. 285-291, IEEE Computer Society, Vancouver, Canada, 2009. Links | BibTeX @inproceedings{NUN09CSE,
title = {High Performance Printing: Increasing Personalized Documents Rendering through PPML Jobs Profiling and Scheduling},
author = {Thiago Nunes and Mateus Raeder and Mariana Kolberg and Luiz Gustavo Fernandes and Alexis Cabeda and Fabio Giannetti},
doi = {10.1109/CSE.2009.203},
year = {2009},
date = {2009-08-01},
booktitle = {Computational Science and Engineering},
pages = {285-291},
publisher = {IEEE Computer Society},
address = {Vancouver, Canada},
keywords = {},
pubstate = {published},
tppubtype = {inproceedings}
}
|
Nunes, Thiago; Giannetti, Fabio; Kolberg, Mariana; Nemetz, Rafael; Cabeda, Alexis; Fernandes, Luiz Gustavo Job Profiling in High Performance Printing Inproceedings doi Proceedings of the 9th ACM Symposium on Document Engineering, pp. 109-118, ACM, Munich, Germany, 2009. Links | BibTeX @inproceedings{NUN09ACM,
title = {Job Profiling in High Performance Printing},
author = {Thiago Nunes and Fabio Giannetti and Mariana Kolberg and Rafael Nemetz and Alexis Cabeda and Luiz Gustavo Fernandes},
doi = {10.1145/1600193.1600218},
year = {2009},
date = {2009-08-01},
booktitle = {Proceedings of the 9th ACM Symposium on Document Engineering},
pages = {109-118},
publisher = {ACM},
address = {Munich, Germany},
keywords = {},
pubstate = {published},
tppubtype = {inproceedings}
}
|
Castro, Márcio ; Fernandes, Luiz Gustavo ; Pousa, Christiane ; Mehaut, Jean-François ; de Aguiar, Marilton Sanchotene NUMA-ICTM: A parallel version of ICTM exploiting memory placement strategies for NUMA machines Inproceedings doi Proc. Workshop on Parallel and Distributed Scientific and Engineering Computing, 23rd IEEE International Symposium on Parallel and Distributed Processing (23rd IPDPS'09), pp. 1-8, IEEE Computer Society, Rome, Italy, 2009. Links | BibTeX @inproceedings{CAS09PDSEC,
title = {NUMA-ICTM: A parallel version of ICTM exploiting memory placement strategies for NUMA machines},
author = {Castro, Márcio and Fernandes, Luiz Gustavo and Pousa, Christiane and Mehaut, Jean-François and de Aguiar, Marilton Sanchotene},
doi = {10.1109/IPDPS.2009.5161155},
year = {2009},
date = {2009-05-01},
booktitle = {Proc. Workshop on Parallel and Distributed Scientific and Engineering Computing, 23rd IEEE International Symposium on Parallel and Distributed Processing (23rd IPDPS'09)},
pages = {1-8},
publisher = {IEEE Computer Society},
address = {Rome, Italy},
keywords = {},
pubstate = {published},
tppubtype = {inproceedings}
}
|
Nunes, Thiago Tasca Aplicando Estratégias de Escalonamento através da Análise do Perfil de Jobs para Ambientes de Impressão Distribuídos Masters Thesis PUCRS, 2009. Links | BibTeX @mastersthesis{NUNES:DM:09,
title = {Aplicando Estratégias de Escalonamento através da Análise do Perfil de Jobs para Ambientes de Impressão Distribuídos},
author = {Thiago Tasca Nunes},
url = {https://gmap.pucrs.br/gmap/files/publications/articles/776d5de209e4c4e66b968b1ec586836f.pdf},
year = {2009},
date = {2009-01-01},
address = {Porto Alegre},
school = {PUCRS},
keywords = {},
pubstate = {published},
tppubtype = {mastersthesis}
}
|
Raeder, Mateus SimGrid x SAN: Um Estudo Comparativo de Ferramentas de Avaliação de Desempenho de Plataformas Distribuídas Masters Thesis PUCRS, 2009. Links | BibTeX @mastersthesis{RAEDER:DM:09,
title = {SimGrid x SAN: Um Estudo Comparativo de Ferramentas de Avaliação de Desempenho de Plataformas Distribuídas},
author = {Mateus Raeder},
url = {https://gmap.pucrs.br/gmap/files/publications/articles/7ca13b477e8454618ddf97078355fc21.pdf},
year = {2009},
date = {2009-01-01},
address = {Porto Alegre, Brazil},
school = {PUCRS},
keywords = {},
pubstate = {published},
tppubtype = {mastersthesis}
}
|
Castro, Márcio Bastos NUMA-ICTM: Uma Versão Paralela do ICTM Explorando Estratégias de Alocação de Memória para Máquinas NUMA Masters Thesis PUCRS, 2009. Links | BibTeX @mastersthesis{CASTRO:DM:09,
title = {NUMA-ICTM: Uma Versão Paralela do ICTM Explorando Estratégias de Alocação de Memória para Máquinas NUMA},
author = {Márcio Bastos Castro},
url = {https://gmap.pucrs.br/gmap/files/publications/articles/000c7fa44ec53b2d15786685a9544bc3.pdf},
year = {2009},
date = {2009-01-01},
address = {Porto Alegre, Brazil},
school = {PUCRS},
keywords = {},
pubstate = {published},
tppubtype = {mastersthesis}
}
|
